UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 666

• Manufacturer Part Number: UPD70F3747GB-GAH-AX
• Description: MCU 32BIT V850ES/HX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Hx3r

Specifications of UPD70F3747GB-GAH-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

664
Baud Rate
Remark
(bps)
1250000
115200
153600
312500
625000
To set the baud rate, perform the following calculation and set the UDnCTL1 and UDnCTL2 registers (when
using internal clock).
<1> Set k = f
<2> Set k = k/2 and m = m + 1 where k ≥ 256.
<3> Repeat <2> until k < 256.
<4> Roundup the first decimal place of k.
<5> Set m to the UDnCTL1 register and k to the UDnCTL2 register.
Example: When f
The representative examples of baud rate settings are shown below.
19200
31250
38400
76800
1200
2400
4800
9600
300
600
If k = 256 by the roundup, perform <2> again (k will become 128).
f
ERR: Baud rate error (%)
XX
UDnCTL1
:
<1> k = 20,000,000/(2 × 153,600) = 65.10…, m = 0
<2>, <3> k = 65.10… < 256, m = 0
<4> Set value of UDnCTL2 register: k = 65 = 41H, set value of UDnCTL1 register: m = 0
Actual baud rate = 20,000,000/(2 × 65)
Baud rate error = {20,000,000/(2 × 65 × 153,600) − 1} × 100
08H
07H
06H
05H
04H
03H
02H
01H
00H
02H
00H
00H
00H
00H
00H
XX
Main clock frequency
/(2 × Target baud rate). Set m = 0.
XX
f
CHAPTER 14 ASYNCHRONOUS SERIAL INTERFACE D (UARTD)
XX
UDnCTL2
= 20 MHz and target baud rate = 153,600 bps
= 32 MHz
D0H
D0H
D0H
D0H
D0H
D0H
D0H
D0H
D0H
0DH
80H
8BH
68H
33H
1AH
Table 14-8. Baud Rate Generator Setting Data
= 153,846 [bps]
= 0.160 [%]
ERR (%)
−0.08
−1.54
−1.54
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
0.39
User’s Manual U18854EJ2V0UD
UDnCTL1
08H
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
00H
00H
f
XX
UDnCTL2
= 20 MHz
A0H
82H
82H
82H
82H
82H
82H
82H
82H
82H
57H
41H
20H
10H
08H
ERR (%)
−0.22
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.16
0.00
0.00
0.00
UDnCTL1
07H
06H
05H
04H
03H
02H
01H
01H
00H
00H
00H
00H
00H
00H
−
f
XX
UDnCTL2
= 16 MHz
D0H
D0H
D0H
D0H
D0H
D0H
D0H
D0H
1AH
0DH
80H
68H
45H
34H
−
ERR (%)
−1.54
−1.54
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.00
0.16
0.16
0.64
0.16
−