UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 437

• Manufacturer Part Number: UPD70F3747GB-GAH-AX
• Description: MCU 32BIT V850ES/HX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Hx3r

Specifications of UPD70F3747GB-GAH-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

8.5.3
TABnCTL0.TABnCE bit is set to 1. When the valid edge of an external trigger input signal is detected, 16-bit
timer/event counter AB starts counting, and outputs a PWM waveform from the TOABn1 to TOABn3 pins.
software trigger, a square wave that has one cycle of the PWM waveform as half its cycle can also be output from the
TOABn0 pin.
TIABn0 pin
In the external trigger pulse output mode, 16-bit timer/event counter AB waits for a trigger when the
Pulses can also be output by generating a software trigger instead of using the external trigger. When using a
External trigger pulse output mode (TABnMD2 to TABnMD0 bits = 010)
selection
Count
clock
Software trigger
generation
TABnCE bit
detector
Edge
Figure 8-16. Configuration in External Trigger Pulse Output Mode
CHAPTER 8 16-BIT TIMER/EVENT COUNTER AB (TAB)
control
Count
start
User’s Manual U18854EJ2V0UD
CCR1 buffer
TABnCCR1
register
Match signal
register
CCR0 buffer register
TABnCCR0 register
16-bit counter
CCR2 buffer
TABnCCR2
register
Match signal
register
CCR3 buffer
TABnCCR3
register
Match signal
register
Match signal
Transfer
Transfer
Transfer
Clear
Transfer
S
R
S
R
S
R
controller
controller
controller
(RS-FF)
controller
Output
(RS-FF)
Output
Output
Output
INTTABnCC1 signal
INTTABnCC2 signal
INTTABnCC3 signal
INTTABnCC0 signal
TOABn1 pin
TOABn2 pin
TOABn3 pin
TOABn0 pin
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