UPD70F3747GB-GAH-AX Renesas Electronics America, UPD70F3747GB-GAH-AX Datasheet - Page 227

• Manufacturer Part Number: UPD70F3747GB-GAH-AX
• Description: MCU 32BIT V850ES/HX3 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Hx3r

Specifications of UPD70F3747GB-GAH-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Pin Name
P30
P31
P32
P33
P34
P35
P38
P39
Notes 1. The INTP7 function and RXDD0 function are alternately used. When using as the RXDD0 function, disable edge detection for the INTP7 function (set the
2. The INTP8 function and RXDD2 function are alternately used. When using as the RXDD2 function, disable edge detection for the INTP8 function (set the
TXDD0
RXDD0
INTP7
ASCKD0
TOAA01
TIAA00
TOAA00
TIAA01
TOAA01
TIAA10
TOAA10
TIAA11
TOAA11
TXDD2
RXDD2
INTP8
Alternate Function
INTF3.INTF31 bit and the INTR3.INTR31 bit to 0). When using as the INTP7 function, stop UARTD0 reception (set the UD0CTL0.UD0RXE bit to 0).
INTF3.INTF39 bit and the INTR3.INTR39 bit to 0). When using as the INTP8 function, stop UARTD2 reception (set the UD2CTL0.UD2RXE bit to 0).
Input
Output
Input
Output
Input
Output
Input
Output
Input
Output
Input
Output
Input
Input
Output
Input
P30 = Setting not required
P31 = Setting not required
P31 = Setting not required
P32 = Setting not required
P32 = Setting not required
P32 = Setting not required
P32 = Setting not required
P33 = Setting not required
P33 = Setting not required
P34 = Setting not required
P34 = Setting not required
P35 = Setting not required
P35 = Setting not required
P38 = Setting not required
P39 = Setting not required
P39 = Setting not required
Pn Register
Pnx Bit of
PM30 = Setting not required
PM31 = Setting not required
PM31 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM32 = Setting not required
PM33 = Setting not required
PM33 = Setting not required
PM34 = Setting not required
PM34 = Setting not required
PM35 = Setting not required
PM35 = Setting not required
PM38 = Setting not required
PM39 = Setting not required
PM39 = Setting not required
Table 4-25. Using Port Pin as Alternate-Function Pin (2/9)
PMn Register
PMnx Bit of
PMC30 = 1
PMC31 = 1
PMC31 = 1
PMC32 = 1
PMC32 = 1
PMC32 = 1
PMC32 = 1
PMC33 = 1
PMC33 = 1
PMC34 = 1
PMC34 = 1
PMC35 = 1
PMC35 = 1
PMC38 = 1
PMC39 = 1
PMC39 = 1
PMCn Register
PMCnx Bit of
PFCE32 = 0
PFCE32 = 0
PFCE32 = 1
PFCE32 = 1
PFCEn Register
PFCEnx Bit of
−
−
−
−
−
−
−
−
−
−
−
−
Note 1
Note 1
PFC32 = 0
PFC32 = 1
PFC32 = 0
PFC32 = 1
PFC33 = 0
PFC33 = 1
PFC34 = 0
PFC34 = 1
PFC35 = 0
PFC35 = 1
Note 2
Note 2
PFCn Register
PFCnx Bit of
−
−
(Registers)
Other Bits
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√