SAK-XE162HN-16F80L AA Infineon Technologies, SAK-XE162HN-16F80L AA Datasheet - Page 22

• Manufacturer Part Number: SAK-XE162HN-16F80L AA
• Description: IC MCU 16BIT 128KB FLASH 64LQFP
• Manufacturer: Infineon Technologies
• Series: XE16xr

Specifications of SAK-XE162HN-16F80L AA

• Core Processor: C166SV2
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
• Peripherals: I²S, POR, PWM, WDT
• Number Of I /o: 40
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 5
Pin
52
53
54
Data Sheet
Symbol
P10.9
U0C0_SELO
4
U0C1_MCLK
OUT
CCU60_CCP
OS2A
TCK_B
T3INB
P10.10
U0C0_SELO
0
CCU60_COU
T63
U0C0_DX2C
U0C1_DX1A
TDI_B
P10.11
U1C0_SCLK
OUT
BRKOUT
U1C0_DX1D
TMS_B
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I St/B
O1
O2
I
IH
I
O0 / I St/B
O1
O2
I
I
IH
O0 / I St/B
O1
O2
I
IH
Type Function
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
Bit 9 of Port 10, General Purpose Input/Output
USIC0 Channel 0 Select/Control 4 Output
USIC0 Channel 1 Master Clock Output
CCU60 Position Input 2
DAP0/JTAG Clock Input
If JTAG pos. B is selected during start-up, an
internal pull-up device will hold this pin high when
nothing is driving it.
If DAP pos. 1 is selected during start-up, an
internal pull-down device will hold this pin low
when nothing is driving it.
GPT12E Timer T3 Count/Gate Input
Bit 10 of Port 10, General Purpose Input/Output
USIC0 Channel 0 Select/Control 0 Output
CCU60 Channel 3 Output
USIC0 Channel 0 Shift Control Input
USIC0 Channel 1 Shift Clock Input
JTAG Test Data Input
If JTAG pos. B is selected during start-up, an
internal pull-up device will hold this pin high when
nothing is driving it.
Bit 11 of Port 10, General Purpose Input/Output
USIC1 Channel 0 Shift Clock Output
OCDS Break Signal Output
USIC1 Channel 0 Shift Clock Input
JTAG Test Mode Selection Input
If JTAG pos. B is selected during start-up, an
internal pull-up device will hold this pin high when
nothing is driving it.
22
XE166 Family / Value Line
General Device Information
XE162FN, XE162HN
V1.3, 2010-04