UPD78F1144AGK-GAJ-AX Renesas Electronics America, UPD78F1144AGK-GAJ-AX Datasheet - Page 436
UPD78F1144AGK-GAJ-AX
Manufacturer Part Number
UPD78F1144AGK-GAJ-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet
1.UPD78F1142AGA-HAB-AX.pdf
(880 pages)
Specifications of UPD78F1144AGK-GAJ-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1144AGK-GAJ-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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434
(Essential)
(Selective)
(Selective)
(Selective)
(Selective)
(Selective)
(Essential)
(Essential)
Changing setting of SPSm register
Changing setting of SDRmn register
Changing setting of SCRmn register
Manipulating target for communication
Changing setting of SMRmn
Starting setting for resumption
Starting communication
Figure 11-82. Procedure for Resuming UART Reception
Writing to SSm
and SMRmr registers
Clearing error flag
CHAPTER 11 SERIAL ARRAY UNIT
register
User’s Manual U17854EJ9V0UD
Stop the target for communication or wait
until the target completes its operation.
Change the setting if an incorrect division
ratio of the operation clock is set.
Change the setting if an incorrect
transfer baud rate is set.
Change the setting if the setting of the
SMRmn and SMRmr registers is incorrect.
Change the setting if the setting of the
SCRmn register is incorrect.
Cleared by using SIRmn register if FEF,
PEF, or OVF flag remains set.
SEmn = 1 when the SSmn bit of the
target channel is set to 1.
The start bit is detected.
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