UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 976

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
3nd Edition
Edition
Modification of Note 1 in and addition of Note 4 to Figure 8-5 Format of Timer
Clock Selection Register 50 (TCL50) and Figure 8-6 Format of Timer Clock
Selection Register 51 (TCL51)
Modification of Note 1 in and addition of Note 3 to Figure 9-5 Format of 8-Bit Timer
H Mode Register 0 (TMHMD0) and Figure 9-6 Format of 8-Bit Timer H Mode
Register 1 (TMHMD1)
Addition of Note to Figure 10-2 Format of Watch Timer Operation Mode Register
(WTM)
Modification of Note and description in 11.1 Functions of Watchdog Timer
Modification of Note and description in 11.4.1 Controlling operation of watchdog
timer
Modification of Remark in 11.4.3 Setting window open period of watchdog timer
Modification of Note 1 in Figure 12-3 Format of Clock Output Selection Register
(CKS) (78K0/KD2, 48-pin Products of 78K0/KC2) and Figure 12-4 Format of
Clock Output Selection Register (CKS) (78K0/KE2, 78K0/KF2)
Addition of Table 13-2 A/D Conversion Time Selection (Conventional-
specification Products
(
Modification of Table 13-3 A/D Conversion Time Selection (Expanded-
specification Products
(
Modification of Figure 13-6 Format of 10-Bit A/D Conversion Result Register
(ADCR)
Modification of Note 1 in Figure 14-4 Format of Baud Rate Generator Control
Register 0 (BRGC0)
Modification of Note 1 in Table 14-4 Set Value of TPS01 and TPS00
Modification of Table 14-5 Set Data of Baud Rate Generator
Modification of Note 1 in Figure 15-5 Format of Asynchronous Serial Interface
Operation Mode Register 6 (ASIM6) (1/2)
Modification of Note 1 in and addition of Note 3 to Figure 15-8 Format of Clock
Selection Register 6 (CKSR6)
Addition of Caution 8 to Figure 15-10 Format of Asynchronous Serial Interface
Control Register 6 (ASICL6) (2/2)
Modification of Note 1 in 15.4.1 (1) Register used
Modification of Note 1 in and addition of Note 3 to Table 15-4 Set Value of TPS63
to TPS60
Modification of Notes 1 and 2 in Figure 16-5 Format of Serial Clock Selection
Register 10 (CSIC10) and Figure 16-6 Format of Serial Clock Selection Register
11 (CSIC11)
Addition of Note 2 in and modification of Table 16-2 Relationship Between
Register Settings and Pins
Modification of 16.4.2 (5) SO1n output
μ
μ
PD78F05xx and 78F05xxD))
PD78F05xxA and 78F05xxDA))
Description
APPENDIX E REVISION HISTORY
CHAPTER 8 8-BIT
TIMER/EVENT
COUNTERS 50 AND 51
CHAPTER 9 8-BIT
TIMERS H0 AND H1
CHAPTER 10 WATCH
TIMER
CHAPTER 11
WATCHDOG TIMER
CHAPTER 12 CLOCK
OUTPUT/BUZZER
OUTPUT
CONTROLLER
CHAPTER 13 A/D
CONVERTER
CHAPTER 14 SERIAL
INTERFACE UART0
CHAPTER 15 SERIAL
INTERFACE UART6
CHAPTER 16 SERIAL
INTERFACES CSI10
AND CSI11
Chapter
(2/4)
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