UPD78F9201MA-CAC-A Renesas Electronics America, UPD78F9201MA-CAC-A Datasheet - Page 264

• Manufacturer Part Number: UPD78F9201MA-CAC-A
• Description: MCU 8BIT 2KB FLASH 128B RAM
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9201MA-CAC-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 7
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

262
An example of a program that performs an internal verify in self programming mode is shown below.
;----------------------------
;START
;----------------------------
FlashVerify:
;----------------------------
;END
;----------------------------
;----------------------------
;START
;----------------------------
FlashVerify:
;----------------------------
;END
;----------------------------
• Internal verify 1
• Internal verify 2
MOV
MOV
MOV
MOV
MOV
MOV
MOV
HALT
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
HALT
MOV
MOV
FLCMD,#01H
FLAPH,#07H
FLAPL,#00H
FLAPHC,#07H
FLAPLC,#FFH
PFS,#00H
WDTE,#0ACH
A,PFS
CmdStatus,A
FLCMD,#02H
FLAPH,#07H
FLAPL,#00H
FLAPHC,#07H
FLAPLC,#20H
PFS,#00H
WDTE,#0ACH
A,PFS
CmdStatus,A
; Sets flash control command (internal verify 1)
; Set the number of block for which internal verify is
; performed, to FLAPH (Example: Block 7 is specified here)
; Sets FLAPL to 00H
; Sets FLAPLC to FFH
; Clears flash status register
; Clears & restarts WDT
; Self programming is started
; Execution result is stored in variable
; (CmdStatus = 0: normal termination, other than 0: abnormal
; termination)
; Sets flash control command (internal verify 2)
; Set the number of block for which internal verify is
; performed, to FLAPH (Example: Block 7 is specified here)
; Sets FLAPL to the start address for verify (Example: Address
; 00H is specified here)
; Sets FLAPLC to the end address for verify (Example: Address
; 20H is specified here)
; Clears flash status register
; Clears & restarts WDT
; Self programming is started
; Execution result is stored in variable
; (CmdStatus = 0: normal termination, other than 0: abnormal
; termination)
CHAPTER 16 FLASH MEMORY
User’s Manual U18172EJ3V0UD