UPD78F9201MA-CAC-A Renesas Electronics America, UPD78F9201MA-CAC-A Datasheet - Page 238

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UPD78F9201MA-CAC-A

Manufacturer Part Number
UPD78F9201MA-CAC-A
Description
MCU 8BIT 2KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9201MA-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Note
Remark
236
Internal verify 1
Internal verify 2
Block erasure
Block blank check
Byte write
Command Name
Set the number of retrials larger than the block erasure time divided by the time (8.5 ms) for one erase, in
accordance with the time (MAX. value) required for flash memory block erasures.
The command internal verify 1 can be executed by specifying an address in the same block but internal
verify 2 is recommended if data is written to two or more addresses in the same block.
Self programming
command completion/error
Flash memory
control block (hardware)
Note
User program
Specific sequence
This command is used to check if data has been
correctly written to the flash memory. It is used to
check whether data has been written to an entire
block.
This command is used to check if data has been
correctly written to the flash memory. It is used to
check whether data has been written in the same
block.
This command is used to erase a specified block.
Specify the block number before execution.
This command is used to check if data in a specified
block has been erased. Specify the block number,
then execute this command.
This command is used to write 1-byte data to the
specified address in the flash memory. Specify the
write address and write data, then execute this
command.
command under execution
Figure 16-9. Self Programming State Transition Diagram
Self programming mode
Table 16-10. Self Programming Controlling Commands
Self programming
Flash memory
Normal mode
CHAPTER 16 FLASH MEMORY
Self programming command
execution by HALT instruction
Function
User’s Manual U18172EJ3V0UD
Operation setting
Operation reference
Operation
setting
Internal verify for 1 block (internal verify
command executed once): 6.8 ms
Internal verify for 1 byte: 27
8.5 ms
480
150
Time Taken from HALT Instruction Execution
μ
μ
s
s
to Command Execution End
self programming
Register for
μ
s

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