DF2166VT33 Renesas Electronics America, DF2166VT33 Datasheet - Page 311
DF2166VT33
Manufacturer Part Number
DF2166VT33
Description
MCU FLASH 3V 512K 33MHZ 144TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.HS2168EPI61H-U.pdf
(876 pages)
Specifications of DF2166VT33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
106
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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10.5
A PWM waveform like the one shown in figure 10.2 is output from the PWX pin. DA13 to DA0
in DADR corresponds to the total width (T
(256 pulses when CFS = 0, 64 pulses when CFS = 1). When OS = 0, this waveform is directly
output. When OS = 1, the output waveform is inverted, and DA13 to DA0 in DADR value
corresponds to the total width (T
types of waveform output available.
Table 10.3 summarizes the relationships between the CKS and CFS bit settings and the resolution,
base cycle, and conversion cycle. The PWM output remains fixed unless DA13 to DA0 in DADR
contain at least a certain minimum value. The relationship between the OS bit and the output
waveform is shown in figures 10.3 and 10.4.
Operation
Base cycle
(T × 64 or T × 256)
t
L
t
f
Figure 10.2 PWMX (D/A) Operation
H
) of the high (1) output pulses. Figures 10.3 and 10.4 show the
L
) of the low (0) pulses output in one conversion cycle
1 conversion cycle
(T × 2
14
(= 16384))
T: Resolution
T
(When CFS = 0, m = 256
When CFS = 1, m = 64)
L
= Σ t
n = 1
m
Rev. 3.00, 03/04, page 269 of 830
Ln
(OS = 0)
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