HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 92
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
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Section 3 MCU Operating Modes
Modes 5 and 6 are externally expanded modes that enable access to external memory and
peripheral devices and also enable access to the on-chip ROM. Mode 5 supports a maximum
address space of 1 Mbyte. Mode 6 supports a maximum address space of 16 Mbytes.
Mode 7 is a single-chip mode that operates using the on-chip ROM, RAM, and internal I/O
registers, and makes all I/O ports available. Mode 7 supports a 1-Mbyte address space.
The H8/3048 Group can be used only in modes 1 to 7. The inputs at the mode pins must select one
of these seven modes. The inputs at the mode pins must not be changed during operation.
3.1.2
The H8/3048 Group has a mode control register (MDCR) that indicates the inputs at the mode
pins (MD
Table 3.2
Address*
H'FFF1
H'FFF2
Note: * The lower 16 bits of the address are indicated.
3.2
MDCR is an 8-bit read-only register that indicates the current operating mode of the H8/3048
Group.
Bits 7 and 6—Reserved: Read-only bits, always read as 1.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
Rev. 7.00 Sep 21, 2005 page 66 of 878
REJ09B0259-0700
Bit
Initial value
Read/Write
Note:
*
2
Register Configuration
Mode Control Register (MDCR)
to MD
Determined by pins MD to MD .
Registers
Name
Mode control register
System control register
0
), and a system control register (SYSCR). Table 3.2 summarizes these registers.
Reserved bits
—
—
7
1
—
—
6
1
2
—
—
5
0
0
Reserved bits
SYSCR
Abbreviation
MDCR
—
—
4
0
—
—
3
0
R/W
R
R/W
MDS2
Mode select 2 to 0
Bits indicating the current
operating mode
—
R
2
*
MDS1
—
Initial Value
Undetermined
H'0B
R
1
*
MDS0
—
R
0
*
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