HD64F3048VTF8 Renesas Electronics America, HD64F3048VTF8 Datasheet - Page 311
HD64F3048VTF8
Manufacturer Part Number
HD64F3048VTF8
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.HD64F3048F16.pdf
(907 pages)
Specifications of HD64F3048VTF8
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F3048VX8
- Current page: 311 of 907
- Download datasheet (6Mb)
9.9.2
Table 9.13 summarizes the registers of port 8.
Table 9.13 Port 8 Registers
Address*
H'FFCD
H'FFCF
Note: * Lower 16 bits of the address.
Port 8 Data Direction Register (P8DDR)
P8DDR is an 8-bit write-only register that can select input or output for each pin in port 8.
Bits 7 to 5 are reserved. They cannot be modified and are always read as 1.
Bit
Modes
1 to 4
Modes
5 to 7
Modes 1 to 6 (Expanded Modes): When bits in P8DDR bit are set to 1, P8
CS
In modes 1 to 4 (expanded modes with on-chip ROM disabled), following a reset only CS
output. The other three pins are input ports. In modes 5 and 6 (expanded modes with on-chip
ROM enabled), following a reset all four pins are input ports.
When the refresh controller is enabled, P8
refresh controller is disabled, P8
setting. For details see table 9.15.
3
output pins. When bits in P8DDR are cleared to 0, the corresponding pins become input ports.
Initial value
Read/Write
Initial value
Read/Write
Register Descriptions
Name
Port 8 data direction
register
Port 8 data register
—
—
—
7
1
1
Reserved bits
0
—
—
—
6
1
1
becomes a generic input/output port according to the P8DDR
Abbreviation
P8DDR
P8DR
0
—
—
—
5
1
1
is used unconditionally for RFSH output. When the
P8 DDR
4
W
W
4
1
0
Rev. 7.00 Sep 21, 2005 page 285 of 878
R/W
W
R/W
P8 DDR
Port 8 data direction 4 to 0
These bits select input or
output for port 8 pins
3
W
W
3
0
0
Mode 1 to 4
H'F0
H'E0
P8 DDR
2
W
W
2
0
0
4
Initial Value
to P8
Section 9 I/O Ports
P8 DDR
REJ09B0259-0700
1
1
W
W
Mode 5 to 7
H'E0
H'E0
1
0
0
become CS
P8 DDR
0
is
0
W
W
0
0
0
0
to
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