DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 95

MCU 5V 128K 100-TQFP

DF2345TE20

Manufacturer Part Number
DF2345TE20
Description
MCU 5V 128K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2345TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2345TE20
HD64F2345TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2345TE20V
Manufacturer:
Renesas
Quantity:
222
Part Number:
DF2345TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Table 3.2
Note:
The CPU's architecture allows for 4 Gbytes of address space, but the H8S/2345 Group actually
accesses a maximum of 16 Mbytes.
Modes 1, 2, and 4 to 6 are externally expanded modes that allow access to external memory and
peripheral devices.
The external expansion modes allow switching between 8-bit and 16-bit bus modes. After program
execution starts, an 8-bit or 16-bit address space can be set for each area, depending on the bus
controller setting. If 16-bit access is selected for any one area, 16-bit bus mode is set; if 8-bit
access is selected for all areas, 8-bit bus mode is set.
Note that the functions of each pin depend on the operating mode.
The H8S/2345 Group can be used only in modes 1 to 7. This means that the mode pins must be
set to select one of these modes. Do not change the inputs at the mode pins during operation.
3.1.3
The H8S/2345 Group has a mode control register (MDCR) that indicates the inputs at the mode
pins (MD
(SYSCR2) *
registers.
MCU
Operating
Mode
0
1
2 *
3 *
4
5
6 *
7 *
* Not used on ROMless version.
2
Register Configuration
to MD
MD
0
1
2
that control the operation of the H8S/2345 Group. Table 3.3 summarizes these
MCU Operating Mode Selection
2
0
MD
0
1
0
1
), and a system control register (SYSCR) and a system control register 2
1
MD
0
1
0
1
0
1
0
1
0
CPU
Operating
Mode
Normal
Advanced
Description
On-chip ROM disabled,
expanded mode
On-chip ROM enabled,
expanded mode
Single-chip mode
On-chip ROM disabled,
expanded mode
On-chip ROM enabled,
expanded mode
Single-chip mode
Rev. 4.00 Feb 15, 2006 page 69 of 900
Section 3 MCU Operating Modes
On-Chip
ROM
Disabled
Enabled
Disabled
Enabled
External Data Bus
Initial
Width
8 bits
8 bits
16 bits
8 bits
8 bits
REJ09B0291-0400
Max.
Width
16 bits
16 bits
16 bits
16 bits
16 bits

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