DF2345TE20 Renesas Electronics America, DF2345TE20 Datasheet - Page 70

• Manufacturer Part Number: DF2345TE20
• Description: MCU 5V 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2345TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2345TE20; HD64F2345TE20

Section 2 CPU
Type
Logic
operations
Shift
operations
Bit-
manipulation
instructions
Rev. 4.00 Feb 15, 2006 page 44 of 900
REJ09B0291-0400
Instruction
AND
OR
XOR
NOT
SHAL
SHAR
SHLL
SHLR
ROTL
ROTR
ROTXL
ROTXR
BSET
BCLR
BNOT
BTST
Size *
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B/W/L
B
B
B
B
Function
Rd
Performs a logical AND operation on a general register and
another general register or immediate data.
Rd
Performs a logical OR operation on a general register and
another general register or immediate data.
Rd
Performs a logical exclusive OR operation on a general
register and another general register or immediate data.
¬ (Rd)
Takes the one's complement of general register contents.
Rd (shift)
Performs an arithmetic shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (shift)
Performs a logical shift on general register contents.
1-bit or 2-bit shift is possible.
Rd (rotate)
Rotates general register contents.
1-bit or 2-bit rotation is possible.
Rd (rotate)
Rotates general register contents through the carry flag.
1-bit or 2-bit rotation is possible.
1
Sets a specified bit in a general register or memory operand
to 1. The bit number is specified by 3-bit immediate data or
the lower three bits of a general register.
0
Clears a specified bit in a general register or memory
operand to 0. The bit number is specified by 3-bit immediate
data or the lower three bits of a general register.
¬ (<bit-No.> of <EAd>)
Inverts a specified bit in a general register or memory
operand. The bit number is specified by 3-bit immediate
data or the lower three bits of a general register.
¬ (<bit-No.> of <EAd>)
Tests a specified bit in a general register or memory
operand and sets or clears the Z flag accordingly. The bit
number is specified by 3-bit immediate data or the lower
three bits of a general register.
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
Rs
Rs
Rs
(Rd)
Rd, Rd
Rd, Rd
Rd, Rd
Rd
Rd
Rd
Rd
#IMM
#IMM
#IMM
(<bit-No.> of <EAd>)
Z
Rd
Rd
Rd