HD6473228F10V Renesas Electronics America, HD6473228F10V Datasheet - Page 191
HD6473228F10V
Manufacturer Part Number
HD6473228F10V
Description
MCU 5V 32K,PB-FREE 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/325r
Datasheet
1.HD6413238F10.pdf
(301 pages)
Specifications of HD6473228F10V
Core Processor
H8/300
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI, UART/USART
Number Of I /o
53
Program Memory Size
8KB (8K x 8)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Peripherals
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6473228F10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Transmitting and receiving operations in the two modes are described next.
9.3.2 Asynchronous Mode
In asynchronous mode, each character is individually synchronized by framing it with a start bit
and stop bit.
Full duplex data transfer is possible because the SCI has independent transmit and receive sections.
Double buffering in both sections enables the SCI to be programmed for continuous data transfer.
Figure 9-2 shows the general format of one character sent or received in the asynchronous mode.
The communication channel is normally held in the mark state (high). Character transmission or
reception starts with a transition to the space state (low).
The first bit transmitted or received is the start bit (low). It is followed by the data bits, in which
the least significant bit (LSB) comes first. The data bits are followed by the parity bit, if present,
then the stop bit or bits (high) confirming the end of the frame.
In receiving, the SCI synchronizes on the falling edge of the start bit, and samples each bit at the
center of the bit (at the 8th cycle of the internal serial clock, which runs at 16 times the bit rate).
(1) Data Format: Table 9-7 lists the data formats that can be sent and received in asynchronous
mode. Eight formats can be selected by bits in the SMR.
Start bit
1 bit
D0
Figure 9-2. Data Format in Asynchronous Mode
D1
7 or 8 bits
One character
184
Dn
0 or 1 bit
Parity bit
Fig 9-2
1 or 2 bits
Stop bit
Idle state
(mark)
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