DF71241D50FPV Renesas Electronics America, DF71241D50FPV Datasheet - Page 504
![MCU RISC FLASH 5V 32K 48-LQFP](/photos/28/61/286106/48-lqfp__plqp0048ja-a_sml.jpg)
DF71241D50FPV
Manufacturer Part Number
DF71241D50FPV
Description
MCU RISC FLASH 5V 32K 48-LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet
1.DF71243N50FPV.pdf
(794 pages)
Specifications of DF71241D50FPV
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF71241D50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 504 of 794
- Download datasheet (5Mb)
Note:
13.3.3
ADCR for each module controls A/D conversion.
Initial value:
Rev. 5.00 Mar. 06, 2009 Page 484 of 770
REJ09B0243-0500
Bit
2 to 0
Bit
15, 14
13
12 to 0 ⎯
R/W:
Bit:
* Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Bit Name
CH[2:0]
Bit Name
⎯
ADST
A/D Control Registers_0 and _1 (ADCR_0 and ADCR_1)
15
R
0
-
14
R
0
-
ADST
R/W
13
Initial
Value
000
Initial
Value
All 0
0
All 0
0
12
R
0
-
11
R
0
-
R/W
R/W
R/W
R
R/W
R
10
R
0
-
Description
Channel Select 2 to 0
Select analog input channels. See table 13.3.
When changing the operating mode, first clear the
ADST bit to 0.
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
A/D Start
Starts or stops A/D conversion. When this bit is set to
1, A/D conversion is started. When this bit is cleared
to 0, A/D conversion is stopped and the A/D converter
enters the idle state. In single or single-cycle scan
mode, this bit is automatically cleared to 0 when A/D
conversion ends on the selected single channel. In
continuous scan mode, A/D conversion is continuously
performed for the selected channels in sequence until
this bit is cleared by a software, reset, or in software
standby mode or module standby mode.
Reserved
These bits are always read as 0. The write value
should always be 0.
R
9
0
-
R
8
0
-
R
7
0
-
R
6
0
-
R
5
0
-
R
4
0
-
R
3
0
-
R
2
0
-
R
1
0
-
R
0
0
-
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