MC908AZ60AVFUER Freescale Semiconductor, MC908AZ60AVFUER Datasheet - Page 295

• Manufacturer Part Number: MC908AZ60AVFUER
• Description: IC MCU 64K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60AVFUER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23.13.8 MSCAN08 Transmitter Control Register
ABTRQ2–ABTRQ0 — Abort Request
TXEIE2–TXEIE0 — Transmitter Empty Interrupt Enable
Freescale Semiconductor
The CPU sets an ABTRQx bit to request that an already scheduled message buffer (TXE = 0) be
aborted. The MSCAN08 will grant the request if the message has not already started transmission, or
if the transmission is not successful (lost arbitration or error). When a message is aborted the
associated TXE and the abort acknowledge flag (ABTAK) (see
Register) will be set and an TXE interrupt is generated if enabled. The CPU cannot reset ABTRQx.
ABTRQx is cleared implicitly whenever the associated TXE flag is set.
1 = Abort request pending
0 = No abort request
1 = A transmitter empty (transmit buffer available for transmission) event results in a transmitter
0 = No interrupt is generated from this event.
empty interrupt.
Address:
The software must not clear one or more of the TXE flags in CTFLG and
simultaneously set the respective ABTRQ bit(s).
The CTCR register is held in the reset state when the SFTRES bit in
CMCR0 is set.
Reset:
Read:
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
$0507
Bit 7
0
0
Figure 23-22. Transmitter Control Register (CTCR)
= Unimplemented
ABTRQ2
6
0
ABTRQ1
5
0
NOTE
NOTE
ABTRQ0
4
0
3
0
0
23.13.7 MSCAN08 Transmitter Flag
Programmer’s Model of Control Registers
TXEIE2
2
0
TXEIE1
1
0
TXEIE0
Bit 0
0
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