MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 4

• Manufacturer Part Number: MCF5253VM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253VM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 70°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Functional Description
2
2.1
The Version 2 ColdFire (CF2) core consists of two independent, decoupled pipeline structures to maximize
performance while minimizing core size. The instruction fetch pipeline (IFP) is a two-stage pipeline for
prefetching instructions. The prefetched instruction stream is then gated into the two-stage operand
execution pipeline (OEP), which decodes the instruction, fetches the required operands, and then executes
the required function.
2.2
Table 2
4
ATA
ADC
AB
AIM
BROM
FlexCAN
CSM
DMAC
eMAC
MBUS
MMC/SD
Mnemonic
Block
Functional Description
shows an alphabetical listing of the modules in the processor.
Version 2 ColdFire Core
Module Inventory
Advanced Technology
Attachment Controller
Battery Level/Keypad
Analog/Digital
Converter
Audio Bus
Audio Interface
Bootloader
Twin Controller Area
Network 2.0B
Communication Unit
Chip Select Module
Direct Memory
Access Controller
Module
enhanced Multiply
Accumulate Module
Memory Bus Interface Bus Operation The bus interface controller transfers data between the ColdFire core or
Multimedia
Card/Secure Digital
Interface
Block Name
MCF5253 ColdFire Processor Data Sheet: Technical Data, Rev. 4
Connectivity
Peripheral
Analog Input
Audio
Interface
Audio
Interface
Boot ROM
Connectivity
Peripheral
Connectivity
Peripheral
Connectivity
Peripheral
Core
Flash Memory
Card Interface
Functional
Grouping
Table 2. Digital and Analog Modules
The ATA block is an AT attachment host interface. Its main use is to
interface with IDE hard disc drives and ATAPI optical disc drives.
The six-channel ADC is based on the Sigma-Delta concept with 12-bit
resolution. Both the analog comparator and digital sections are integrated
in the MCF5253.
The audio interfaces connect to an internal bus that carries all audio data.
Each receiver places its received data on the audio bus and each
transmitter takes data from the audio bus for transmission.
The audio interface module provides the necessary input and output
features to receive and transmit digital audio signals over serial audio
interfaces (IIS/EIAJ) and over digital audio interfaces (IEC958).
The MCF5253 incorporates a ROM Bootloader, which enables booting
from UART, I2C, SPI, or IDE devices.
The FlexCan module is a full implementation of the Bosch CAN protocol
specification 2.0B, which supports both standard and extended message
frames.
Three programmable chip-select outputs (CS0/CS4, CS1, and CS2)
provide signals that enable glueless connection to external memory and
peripheral circuits.
There are four fully programmable DMA channels for quick data transfer.
The integrated eMAC unit provides a common set of DSP operations and
enhances the integer multiply instructions in the ColdFire architecture.
DMA and memory, peripherals, or other devices on the external bus.
The interface is Sony® Memory Stick®, SecureDigital, and Multi-Media
card compatible.
Note: The Sony Memory Interface does not support Sony MagicGate™.
Brief Description
Freescale Semiconductor