MCF5253VM140J Freescale Semiconductor, MCF5253VM140J Datasheet - Page 20
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MCF5253VM140J
Manufacturer Part Number
MCF5253VM140J
Description
IC MCU 2.1MIPS 140MHZ 225MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF525xr
Datasheets
1.MCF5253VM140J.pdf
(34 pages)
2.MCF5253VM140J.pdf
(8 pages)
3.MCF5253VM140J.pdf
(648 pages)
4.MCF5253VM140J.pdf
(2 pages)
Specifications of MCF5253VM140J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
140MHz
Connectivity
CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, WDT
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Data Converters
A/D 6x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 70°C
Package / Case
225-MAPBGA
Processor Series
MCF525x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5253VM140J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Package Information and Pinout
The MCF5253 device is available in the following package:
6.1
Table 19
for the device pin list, sorted by signal identification.
20
A23/GPO54
•
A20/A24
Name
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A21
A22
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
A1
A2
A3
A4
A5
A6
A7
A8
A9
225 MAPBGA 13 x 13 mm 0.8 mm pitch package as shown in
defines all the settings of each pad. See
Pin Assignment
Drive Type/
Strength
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
IO / 8 mA
O / 2 mA
O / 2 mA
O / 2 mA
O / 2 mA
O / 2 mA
O / 2 mA
O / 2 mA
O / 2 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
O / 8 mA
MCF5253 ColdFire Processor Data Sheet: Technical Data, Rev. 4
Load
(pF)
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
40
40
40
40
40
40
40
40
40
40
40
Table 19. 225 MAPBGA Pin Assignment
Function
A20
A23
1st
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Function
Address Bus
2nd
A24
Data Bus
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Figure 7
Pinconfig
Register
for the ball map of pin locations and
Bit
31
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
O54
Pin
GP
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Figure
Reset
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
HI_Z
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
6.
H
H
H
H
G
G
G
H
H
G
E
G
E
E
D
D
D
C
E
E
B
C
D
C
B
A
B
A
3
2
1
5
1
3
2
4
6
F
2
5
F
3
F
1
1
4
2
F
4
3
F
5
F
6
3
1
2
1
4
5
1
2
4
3
2
2
3
3
Audio Clock Select: 1-LRCK3 pin;
0-CRIN pin
Boot Mode Select:1-Memory
connected to CS0; 0-Internal boot
rom
Freescale Semiconductor
Notes
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Table 21