MCF5329CVM240J Freescale Semiconductor, MCF5329CVM240J Datasheet - Page 29

• Manufacturer Part Number: MCF5329CVM240J
• Description: IC MPU RISC 240MHZ 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF532xr

Specifications of MCF5329CVM240J

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, SSI, UART/USART, USB, USB OTG
• Peripherals: DMA, LCD, PWM, WDT
• Number Of I /o: 94
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Family Name: MPC5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 240MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (max): 1.6/1.95/2.75/3.6V
• Operating Supply Voltage (min): 1.4/1.7/2.25/3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Processor Series: MCF532xx
• Core: ColdFire V3
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Leaded Process Compatible: Yes
• Rohs Compliant: Yes
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

5.9
Freescale Semiconductor
1
Num
During low power STOP, the synchronizers for the RESET input are bypassed and RESET is asserted asynchronously to
the system. Thus, RESET must be held a minimum of 100 ns.
R1
R2
R3
R4
R5
R6
R7
R8
RESET Input valid to FB_CLK High
FB_CLK High to RESET Input invalid
RESET Input valid Time
FB_CLK High to RSTOUT Valid
RSTOUT valid to Config. Overrides valid
Configuration Override Setup Time to RSTOUT invalid
Configuration Override Hold Time after RSTOUT invalid
RSTOUT invalid to Configuration Override High Impedance
Configuration Overrides*:
Reset and Configuration Override Timing
(RCON, Override pins])
Refer to the CCM chapter of the MCF5329 Reference Manual for more information.
RSTOUT
FB_CLK
RESET
Figure 14. RESET and Configuration Override Timing
GPIO Outputs
GPIO Inputs
Table 13. Reset and Configuration Override Timing
MCF532x ColdFire
1
FB_CLK
Characteristic
R1
G3
Figure 13. GPIO Timing
®
R3
Microprocessor Data Sheet, Rev. 5
NOTE
G1
G4
R2
R4
G2
Symbol
t
t
R5
t
t
CHROV
ROVCV
t
ROICZ
t
t
t
RVCH
CHRI
RIVT
COS
COH
R6
Min
1.5
20
—
—
9
5
0
0
Electrical Characteristics
R4
R7
Max
—
—
—
10
—
—
—
1
R8
Unit
t
t
t
CYC
CYC
CYC
ns
ns
ns
ns
ns
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