MCF5329CVM240J Freescale Semiconductor, MCF5329CVM240J Datasheet - Page 21
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MCF5329CVM240J
Manufacturer Part Number
MCF5329CVM240J
Description
IC MPU RISC 240MHZ 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF532xr
Datasheet
1.MCF5328CVM240J.pdf
(50 pages)
Specifications of MCF5329CVM240J
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
240MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, SPI, SSI, UART/USART, USB, USB OTG
Peripherals
DMA, LCD, PWM, WDT
Number Of I /o
94
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Family Name
MPC5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
240MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8/2.5/3.3V
Operating Supply Voltage (max)
1.6/1.95/2.75/3.6V
Operating Supply Voltage (min)
1.4/1.7/2.25/3V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
256
Package Type
MA-BGA
Processor Series
MCF532xx
Core
ColdFire V3
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5329CVM240J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.6.1
A multi-function external bus interface called FlexBus is provided with basic functionality to interface to slave-only devices up
to a maximum bus frequency of 80MHz. It can be directly connected to asynchronous or synchronous devices such as external
boot ROMs, flash memories, gate-array logic, or other simple target (slave) devices with little or no additional circuitry. For
asynchronous devices a simple chip-select based interface can be used. The FlexBus interface has six general purpose
chip-selects (FB_CS[5:0]) which can be configured to be distributed between the FlexBus or SDRAM memory interfaces.
Chip-select, FB_CS0 can be dedicated to boot ROM access and can be programmed to be byte (8 bits), word (16 bits), or
longword (32 bits) wide. Control signal timing is compatible with common ROM/flash memories.
5.6.1.1
The following timing numbers indicate when data is latched or driven onto the external bus, relative to the system clock.
Freescale Semiconductor
* The timings are also valid for inputs sampled on the negative clock edge.
Num
FB1
FB2
FB3
—
FlexBus
FlexBus AC Timing Characteristics
Frequency of Operation
Clock Period (FB_CLK)
Address, Data, and Control Output Valid (A[23:0], D[31:0],
FB_CS[5:0], R/W, TS, BE/BWE[3:0] and OE)
Address, Data, and Control Output Hold (A[23:0], D[31:0],
FB_CS[5:0], R/W, TS, BE/BWE[3:0], and OE)
FB_CLK
Inputs
Input Setup And Hold
FB_CLK (80MHz)
Input Rise Time
MCF532x ColdFire
Input Fall Time
Figure 6. General Input Timing Requirements
Table 9. FlexBus AC Timing Specifications
B4
Characteristic
®
Invalid
Microprocessor Data Sheet, Rev. 5
V
V
V
V
h
h
1
1, 2
l
l
= V
= V
= V
= V
TSETUP
IH
IH
IL
IL
1.5V Valid
THOLD
1.5V
1.5V
t
t
FBCK (
t
Symbol
FBCHDCV
FBCHDCI
f
t
t
sys/3
rise
fall
t
cyc)
Invalid
B5
12.5
Min
—
—
1
Electrical Characteristics
Max
7.0
80
—
—
Unit
Mhz
ns
ns
ns
21