MCF5270CAB100 Freescale Semiconductor, MCF5270CAB100 Datasheet - Page 8

• Manufacturer Part Number: MCF5270CAB100
• Description: MCU V2 COLDFIRE 64K SRAM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5270CAB100

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 39
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-QFP
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Design Recommendations
5
5.1
5.2
8
•
•
•
•
Use a 4-layer printed circuit board with the VDD and GND pins connected directly to the power
and ground planes for the MCF5271.
See application note AN1259, System Design and Layout Techniques for Noise Reduction in
Processor-Based Systems.
Match the PC layout trace width and routing to match trace length to operating frequency and board
impedance. Add termination (series or therein) to the traces to dampen reflections. Increase the
PCB impedance (if possible) keeping the trace lengths balanced and short. Then do cross-talk
analysis to separate traces with significant parallelism or are otherwise "noisy". Use 6 mils trace
and separation. Clocks get extra separation and more precise balancing.
33 μF, 0.1 μF, and 0.01 μF across each power supply
Design Recommendations
Layout
Power Supply
1
2
Signal Name
PLL_TEST
Refers to pin’s primary function. All pins which are configurable for GPIO have a pullup enabled
in GPIO mode with the exception of PBUSCTL[7], PBUSCTL[4:0], PADDR, PBS, PSDRAM.
If JTAG_EN is asserted, these pins default to Alternate 1 (JTAG) functionality. The GPIO module
is not responsible for assigning these pins.
VDDPLL
VSSPLL
Table 2. MCF5270 and MCF5271 Signal Information and Muxing (continued)
OVDD
TEST
VDD
VSS
MCF5271 Integrated Microprocessor Hardware Specification, Rev. 4
GPIO
—
—
—
—
—
—
—
Alternate 1 Alternate 2 Dir.
—
—
—
—
—
—
—
Power Supplies
Test
—
—
—
—
—
—
—
I
I
I
I
I
I
I
1
1, 18, 32, 41, 55,
69, 81, 94, 105,
114, 128, 138,
17, 31, 40, 54,
67, 80, 88, 93,
104, 113, 127,
137, 144, 160
16, 53, 103
MCF5270
MCF5271
160 QFP
145
19
87
84
—
E5, E7, E10, F7,
A1, A14, E6, E9,
F6, F8, F10, G7,
D6, F11, G4, L4
F9, G6, G8, H7,
J10, K5, K6, K8
J9, K7, P1, P14
H8, H9, J6, J8,
G9, H6, J5, J7,
196 MAPBGA
MCF5270
MCF5271
M13
Freescale Semiconductor
L14
F5