R5F2L387ANFP#U1 Renesas Electronics America, R5F2L387ANFP#U1 Datasheet - Page 631
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R5F2L387ANFP#U1
Manufacturer Part Number
R5F2L387ANFP#U1
Description
MCU 1KB FLASH 48K ROM 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/38Ar
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L387ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
68
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 594 of 802
27.4
Figure 27.4
27.4.1
(1) I
(2) I
Legend:
S
SLA
R/W
A
DATA : Transmit/receive data
P
(a) I
(b) I
2
2
C bus format
C bus timing
When the FS bit in the SAR register is set to 0, the I
Figure 27.4 shows the I
8 bits.
: Start condition
: Slave address
: Indicates the direction of data transmission/reception
2
2
: Acknowledge
: Stop condition
The master device changes the SDA signal from high to low while the SCL signal is held high.
Data is transmitted when:
R/W value is 1: From the slave device to the master device
R/W value is 0: From the master device to the slave device
The receive device sets the SDA signal to low.
The master device changes the SDA signal from low to high while the SCL signal is held high.
C bus format (FS = 0)
C bus format When Start Condition is Retransmitted (FS = 0)
I
2
SDA
SCL
S
C bus Interface Mode
1
S
1
I
2
C bus Format
S
I
2
C bus Format and Bus Timing
SLA
SLA
7
7
1 to 7
SLA
1
1
R/W
R/W
8
2
1
R/W
1
C bus Format and Bus Timing. The first frame following the start condition consists of
Oct 30, 2009
A
1
A
1
9
A
DATA
DATA
n
n1
1 to 7
m1
DATA
8
A
1
m
A/A
1
2
9
C bus format is used for communication.
A
S
1
A/A
1 to 7
1
SLA
7
P
1
DATA
1
8
Upper: Number of transfer bits (n1, n2 = 1 to 8)
Lower: Number of transfer frames (m1, m2 = 1 or more)
Number of transfer bits (n = 1 to 8)
Number of transfer frames (m = 1 or more)
R/W
1
9
A
A
1
P
DATA
n2
27. I
m2
2
C bus Interface
A/A
1
P
1
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