R5F2L387ANFP#U1 Renesas Electronics America, R5F2L387ANFP#U1 Datasheet - Page 322
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R5F2L387ANFP#U1
Manufacturer Part Number
R5F2L387ANFP#U1
Description
MCU 1KB FLASH 48K ROM 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/38Ar
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L387ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
68
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 285 of 802
19.5.1
Notes:
Table 19.10
j = A, B, C, or D
BFC, BFD: Bits in TRCMR register
TRCGRA
TRCGRB
TRCGRC
TRCGRD
TRCGRC
TRCGRD
1. Set to these bits when the TSTART bit in the TRCMR register is set to 0 (count stops).
2. If the pin function is set for waveform output (refer to 6.6 Port Settings ), the initial output level is output when the
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Register
Address 0121h
TRCCR1 register is set.
Symbol
Symbol
CCLR
TCK0
TCK1
TCK2
Bit
TOC
TOD
TOA
TOB
Timer RC Control Register 1 (TRCCR1) in Timer Mode (Output Compare
Function)
BFC = 0
BFD = 0
BFC = 1
BFD = 1
CCLR
Functions of TRCGRj Register when Using Output Compare Function
b7
0
TRCIOA output level select bit
TRCIOB output level select bit
TRCIOC output level select bit
TRCIOD output level select bit
Count source select bit
TRC counter clear select bit
Setting
TCK2
b6
0
General register. Write a compare value to one of these
registers.
General register. Write a compare value to one of these
registers.
Buffer register. Write the next compare value to one of
these registers. (Refer to 19.3.2 Buffer Operation .)
Oct 30, 2009
Bit Name
TCK1
b5
0
(1)
TCK0
(1, 2)
(1, 2)
(1, 2)
(1, 2)
b4
0
Register Function
0: Clear disabled (free-running operation)
0: Initial output at low
1: Initial output at high
b6 b5 b4
1: Clear by compare match with the TRCGRA register
0 0 0: f1
0 0 1: f2
0 1 0: f4
0 1 1: f8
1 0 0: f32
1 0 1: TRCCLK input rising edge
1 1 0: Do not set.
1 1 1: Do not set.
TOD
b3
0
TOC
b2
0
Function
TOB
b1
0
TOA
b0
0
TRCIOA
TRCIOB
TRCIOC
TRCIOD
TRCIOA
TRCIOB
Output Compare
Output Pin
19. Timer RC
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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