R5F2L387ANFP#U1 Renesas Electronics America, R5F2L387ANFP#U1 Datasheet - Page 454
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R5F2L387ANFP#U1
Manufacturer Part Number
R5F2L387ANFP#U1
Description
MCU 1KB FLASH 48K ROM 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/38Ar
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L387ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
68
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 417 of 802
Figure 20.23
20.8.17 Operating Example
TRDGRA0 register
TRDGRC0 register
TRDSTR register
TRDSTR register
TRDSR0 register
TRDSR0 register
TRDIOA0 output
TRDIOB0 output
TSTART0 bit in
CSEL0 bit in
Operating Example in PWM3 Mode
IMFA bit in
IMFB bit in
Count source
j = either A or B
The above applies under the following conditions:
• Both the TOA0 and TOB0 bits in the TRDOCR register are set to 0 (initial output at low, high-level at compare match with
• The BFC0 bit in the TRDMR register is set to 1 (TRDGRC0 register is used as the buffer register of the TRDGRA0 register).
the TRDGRj1 register, low-level output at compare match with the TRDGRj0 register).
TRD0 register value
FFFFh
0000h
m
1
0
1
0
1
0
1
0
n
p
q
Initial output “L”
Oct 30, 2009
Output “H” at compare
TRDGRA1 register
match with the
Set to 0 by a program.
m
Output “L” at compare match
with the TRDGRA0 register
m
Transfer from the buffer register
to the general register
Set to 0 by a program.
Transfer
q+1
p+1
Set to 0 by a program.
n+1
p-q
m+1
Set to 0 by a program.
m: Value set in TRDGRA0 register
n: Value set in TRDGRA1 register
p: Value set in TRDGRB0 register
q: Value set in TRDGRB1 register
m
Transfer from the buffer register
Next data
to the general register
m-n
Set to 0 by a program.
Count stops
Transfer
20. Timer RD
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