M38588GCSP#U0 Renesas Electronics America, M38588GCSP#U0 Datasheet - Page 12

• Manufacturer Part Number: M38588GCSP#U0
• Description: IC 740/3858 MCU QZ-ROM 42DIP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38588GCSP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 9x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3858 Group
MEMORY
Special Function Register (SFR) Area
The Special Function Register area in the zero page contains
control registers such as I/O ports and timers.
RAM
RAM is used for data storage and for stack area of subroutine
calls and interrupts.
ROM
The first 128 bytes and the last 2 bytes of ROM are reserved for
device testing and the rest is user area for storing programs.
Interrupt Vector Area
The interrupt vector area contains reset and interrupt vectors.
Zero Page
Access to this area with only 2 bytes is possible in the zero page
addressing mode.
Special Page
Access to this area with only 2 bytes is possible in the special
page addressing mode.
Fig. 8 Memory map diagram
REJ03B0139-0111
page 10 of 73
R A M a r e a
R O M a r e a
R A M s i z e
R O M s i z e
( b y t e s )
( b y t e s )
1 2 2 8 8
1 6 3 8 4
2 0 4 8 0
2 4 5 7 6
2 8 6 7 2
3 2 7 6 8
3 6 8 6 4
4 0 9 6 0
4 5 0 5 6
4 9 1 5 2
5 3 2 4 8
5 7 3 4 4
6 1 4 4 0
1 0 2 4
1 5 3 6
2 0 4 8
4 0 9 6
8 1 9 2
1 9 2
2 5 6
3 8 4
5 1 2
6 4 0
7 6 8
8 9 6
Rev.1.11
F 0 0 0
E 0 0 0
D 0 0 0
C 0 0 0
B 0 0 0
A 0 0 0
9 0 0 0
8 0 0 0
7 0 0 0
6 0 0 0
5 0 0 0
4 0 0 0
3 0 0 0
2 0 0 0
1 0 0 0
0 0 F F
0 1 3 F
0 1 B F
0 2 3 F
0 2 B F
0 3 3 F
0 3 B F
0 4 3 F
0 6 3 F
0 8 3 F
A d d r e s s
Y Y Y Y
A d d r e s s
X X X X
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
Dec 18, 2008
F 0 8 0
E 0 8 0
D 0 8 0
C 0 8 0
B 0 8 0
A 0 8 0
9 0 8 0
8 0 8 0
7 0 8 0
6 0 8 0
5 0 8 0
4 0 8 0
3 0 8 0
2 0 8 0
1 0 8 0
A d d r e s s
Z Z Z Z
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
R A M
R O M
X X X X
Y Y Y Y
F F D B
F F D C
F F F E
F F F F
Z Z Z Z
F F 0 0
0 0 0 0
0 0 4 0
0 1 0 0
ROM Code Protect Address (address FFDB
Address FFDB
the ROM code protect address. "00
when selecting the protect bit write by using a serial programmer
or selecting protect enabled for writing shipment by Renesas
Technology corp.. When "00
dress, the protect function is enabled, so that reading or writing
from/to QzROM is disabled by a serial programmer.
As for the QzROM product in blank, the ROM code is protected by
selecting the protect bit write at ROM writing with a serial pro-
grammer.
As for the QzROM product shipped after writing, "00
enabled) or "FF
protect address when Renesas Technology corp. performs writing.
The writing of “00
setup (“MASK option” written in the mask file converter) when or-
dering.
Because the contents of RAM are indefinite at reset, set initial val-
ues before using.
Notes
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
1 6
( R O M c o d e p r o t e c t a d d r e s s )
R e s e r v e d R O M a r e a
I n t e r r u p t v e c t o r a r e a
R e s e r v e d R O M a r e a
R e s e r v e d R O M a r e a
16
16
S F R a r e a
, which is the reserved ROM area of QzROM, is
N o t u s e d
( 1 2 8 b y t e s )
" (protect disabled) is written into the ROM code
16
” or “FF
16
16
" is set to the ROM code protect ad-
” can be selected as ROM option
16
" is written into this address
Z e r o p a g e
S p e c i a l p a g e
16
" (protect
16
)