MC9S12XET256MAL Freescale Semiconductor, MC9S12XET256MAL Datasheet - Page 630
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MC9S12XET256MAL
Manufacturer Part Number
MC9S12XET256MAL
Description
MCU 16BIT 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12XEP768CAL.pdf
(1328 pages)
Specifications of MC9S12XET256MAL
Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
112-LQFP
Cpu Family
HCS12X
Device Core Size
16b
Frequency (max)
50MHz
Interface Type
CAN/SCI/SPI
Total Internal Ram Size
16KB
# I/os (max)
91
Number Of Timers - General Purpose
25
Operating Supply Voltage (typ)
1.8/2.8/5V
Operating Supply Voltage (max)
1.98/2.9/5.5V
Operating Supply Voltage (min)
1.72/2.7/3.13V
On-chip Adc
16-chx12-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
No. Of I/o's
91
Eeprom Memory Size
4KB
Ram Memory Size
16KB
Cpu Speed
50MHz
No. Of Timers
3
No. Of Pwm Channels
8
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
S12XE
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
91
Number Of Timers
25
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12XET256MAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12XET256MAL
Manufacturer:
FREESCALE
Quantity:
20 000
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1. Read: Anytime
Module Base + 0x0018 to Module Base + 0x001B
1. Read: Anytime
Module Base + 0x0010 to Module Base + 0x0013
Chapter 16 Freescale’s Scalable Controller Area Network (S12MSCANV3)
16.3.2.17 MSCAN Identifier Acceptance Registers (CANIDAR0-7)
On reception, each message is written into the background receive buffer. The CPU is only signalled to
read the message if it passes the criteria in the identifier acceptance and identifier mask registers
(accepted); otherwise, the message is overwritten by the next message (dropped).
The acceptance registers of the MSCAN are applied on the IDR0–IDR3 registers (see
“Identifier Registers
“Identifier Acceptance
For extended identifiers, all four acceptance and mask registers are applied. For standard identifiers, only
the first two (CANIDAR0/1, CANIDMR0/1) are applied.
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
630
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
AC[7:0]
Field
7-0
Figure 16-21. MSCAN Identifier Acceptance Registers (Second Bank) — CANIDAR4–CANIDAR7
Figure 16-20. MSCAN Identifier Acceptance Registers (First Bank) — CANIDAR0–CANIDAR3
Reset
Reset
W
R
W
R
Acceptance Code Bits — AC[7:0] comprise a user-defined sequence of bits with which the corresponding bits
of the related identifier register (IDRn) of the receive message buffer are compared. The result of this comparison
is then masked with the corresponding identifier mask register.
AC7
AC7
0
7
0
7
(IDR0–IDR3)”) of incoming messages in a bit by bit manner (see
Table 16-22. CANIDAR0–CANIDAR3 Register Field Descriptions
Filter”).
AC6
AC6
0
6
0
6
MC9S12XE-Family Reference Manual , Rev. 1.23
AC5
AC5
0
5
5
0
AC4
AC4
0
4
Description
0
4
AC3
AC3
0
3
3
0
AC2
AC2
0
2
0
2
Access: User read/write
Freescale Semiconductor
Access: User read/write
Section 16.3.3.1,
AC1
Section 16.4.3,
AC1
0
1
1
0
AC0
AC0
0
0
0
0
(1)
(1)
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