MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 29

• Manufacturer Part Number: MC908GR4CDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR4CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2.6 Register Summary
Freescale Semiconductor
$0000
$0001
$0002
$0003
Addr.
Register Name
Note: $FFF6–$FFFD
Port A Data Register
Port B Data Register
Port C Data Register
Port D Data Register
8 security bytes
contains
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 7)
(PTC)
(PTD)
(PTA)
(PTB)
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
$FFDC
$FE0D
$FF7D
$FFDB
$FFFE
$FE0F
$FE10
$FE1F
$FE20
$FF55
$FF56
$FF7E
$FF7F
$FFFF
↓
↓
↓
↓
↓
↓
Figure 2-1. Memory Map (Continued)
Bit 7
0
0
0
0
= Unimplemented
PTD6
6
0
0
0
Reserved for Compatibility with Monitor Code
FLASH Block Protect Register (FLBPR)
PTD5
PTB5
Low byte of reset vector when read
5
0
0
COP Control Register (COPCTL)
(36 Bytes including $FFFF)
for A-Family Parts
R = Reserved
Unimplemented
Unimplemented
Unimplemented
FLASH Vectors
Monitor ROM
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
PTB4
PTD4
310 Bytes
Reserved
16 Bytes
40 Bytes
93 Bytes
3 Bytes
4
0
0
PTA3
PTB3
PTD3
3
0
PTA2
PTB2
PTD2
U = Unaffected
2
0
Register Summary
PTA1
PTB1
PTC1
PTD1
1
PTA0
PTB0
PTC0
PTD0
Bit 0
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