MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 111

• Manufacturer Part Number: MC908GR4CDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR4CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.5 FLASH Mass Erase Operation
Use this step-by-step procedure to erase entire FLASH memory:
11.6 FLASH Program/Read Operation
Programming of the FLASH memory is done on a row basis. A row consists of 32 consecutive bytes
starting from addresses $XX00, $XX20, $XX40, $XX60, $XX80, $XXA0, $XXC0, and $XXE0. During the
programming cycle, make sure that all addresses being written fit within one of the ranges specified
above. Attempts to program addresses in different row ranges in one programming cycle will fail. Use this
step-by-step procedure to program a row of FLASH memory
1. When in Monitor mode, with security sequence failed see
Freescale Semiconductor
10. After a time, t
10. After a time, t
register instead of any FLASH address.
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set both the ERASE bit, and the MASS bit in the FLASH control register.
2. Read from the FLASH block protect register.
3. Write any data to any FLASH address
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE and MASS bits.
8. Wait for a time, t
9. Clear the HVEN bit.
While these operations must be performed in the order shown, other
unrelated operations may occur between the steps.
Mass erase is disabled whenever any block is protected (FLBPR does not
equal $FF).
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps.
Only bytes which are currently $FF may be programmed.
rcv
rcv
nvh
(typ. 1μs), the memory can be accessed again in read mode.
nvs
MErase
nvhl
(typical 1μs), the memory can be accessed again in read mode.
(min. 10μs)
(min. 5μs)
(min. 100μs)
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
(min. 4ms)
(1)
within the FLASH memory address range.
NOTE
NOTE
NOTE
NOTE
Chapter 15 Monitor ROM
(Figure 11-2
(MON), write to the FLASH block protect
is a flowchart representation):
FLASH Mass Erase Operation
111