MC908GR4CDWE Freescale Semiconductor, MC908GR4CDWE Datasheet - Page 118

• Manufacturer Part Number: MC908GR4CDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR4CDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

External Interrupt (IRQ)
When an interrupt pin is both falling-edge and low-level-triggered, the interrupt remains set until both of
the following occur:
The vector fetch or software clear may occur before or after the interrupt pin returns to high level. As long
as the pin is low, the interrupt request remains pending. A reset will clear the latch and the MODE control
bit, thereby clearing the interrupt even if the pin stays low.
When set, the IMASK bit in the INTSCR mask all external interrupt requests. A latched interrupt request
is not presented to the interrupt priority logic unless the IMASK bit is clear.
118
Addr.
$001D
•
•
Vector fetch or software clear
Return of the interrupt pin to high level
IRQ
Register Name
IRQ Status and Control
Register (INTSCR)
DECODER
V
VECTOR
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests.
FETCH
RESET
DD
ACK
INTERNAL
PULLUP
DEVICE
Reset:
Read:
Write:
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 12-1. IRQ Module Block Diagram
V
Figure 12-2. IRQ I/O Register Summary
MODE
DD
Bit 7
D
CK
0
0
CLR
IRQ
FF
Q
= Unimplemented
6
0
0
NOTE
5
0
0
IMASK
SYNCHRO-
VOLTAGE
4
DETECT
0
0
NIZER
HIGH
IRQF
3
0
ACK
IRQF
2
0
0
Freescale Semiconductor
IMASK
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQ
INTERRUPT
REQUEST
TO MODE
SELECT
LOGIC
1
0
MODE
Bit 0
0