S9S08SG16E1VTJ Freescale Semiconductor, S9S08SG16E1VTJ Datasheet - Page 88

• Manufacturer Part Number: S9S08SG16E1VTJ
• Description: MCU 16K FLASH 20-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08SG16E1VTJ

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-TSSOP
• Processor Series: S08SG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SPI, SCI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 2
• Operating Supply Voltage: - 0.3 V to + 5.8 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• On-chip Dac: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 6 Parallel Input/Output Control
6.6.2.3
6.6.2.4
88
PTBPE[7:0]
PTBSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBPE7
PTBSE7
Internal Pull Enable for Port B Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
Output Slew Rate Enable for Port B Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
Port B Pull Enable Register (PTBPE)
0
Port B Slew Rate Enable Register (PTBSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured to detect
rising edges.
PTBPE6
PTBSE6
Figure 6-13. Internal Pull Enable for Port B Register (PTBPE)
Figure 6-14. Slew Rate Enable for Port B Register (PTBSE)
0
0
6
6
Table 6-12. PTBPE Register Field Descriptions
Table 6-13. PTBSE Register Field Descriptions
PTBPE5
PTBSE5
0
0
5
5
MC9S08SG32 Data Sheet, Rev. 8
PTBPE4
PTBSE4
NOTE
0
0
4
4
Description
Description
PTBPE3
PTBSE3
3
0
3
0
PTBPE2
PTBSE2
0
0
2
2
PTBPE1
PTBSE1
Freescale Semiconductor
0
0
1
1
PTBPE0
PTBSE0
0
0
0
0