S9S08SG16E1VTJ Freescale Semiconductor, S9S08SG16E1VTJ Datasheet - Page 316

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S9S08SG16E1VTJ

Manufacturer Part Number
S9S08SG16E1VTJ
Description
MCU 16K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of S9S08SG16E1VTJ

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, SCI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
22
Number Of Timers
2
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
On-chip Dac
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Appendix A Electrical Characteristics
A.12 AC Characteristics
This section describes ac timing characteristics for each peripheral system.
A.12.1
316
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request.
When any reset is initiated, internal circuitry drives the reset pin low for about 66 cycles of t
frequency changes to the untrimmed DCO frequency (f
to 0, and there is an extra divide-by-two because BDIV is reset to 0:1. After other resets trim stays at the pre-reset value.
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
Timing is shown with respect to 20% V
1
2
3
4
5
6
C
D
D
D
D
D
C
Control Timing
Bus frequency
(t
Internal low power
oscillator period
External reset pulse width
Reset low drive
Pin interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
cyc
= 1/f
Bus
)
3
Rating
disabled (PTxSE = 0)
disabled (PTxSE = 0)
2
enabled (PTxSE = 1)
enabled (PTxSE = 1)
DD
Asynchronous path
Synchronous path
and 80% V
MC9S08SG32 Data Sheet, Rev. 8
Slew rate control
Slew rate control
Slew rate control
Slew rate control
Table A-13. Control Timing
-40 C to 125 C
-40 C to 125 C
> 125 C
> 125 C
DD
DD
reset
levels. Temperature range –40°C to 125°C.
5
= 5.0V, 25°C unless otherwise stated.
5
2
4
= (f
dco_ut
t
t
t
t
Symbol
ILIH,
Rise
Rise
Rise
t
t
t
rstdrv
f
extrst
LPO
Bus
, t
, t
, t
t
)/4) because TRIM is reset to 0x80 and FTRIM is reset
IHIL
Fall
Fall
Fall
1.5 x t
66 x t
Min
700
600
100
100
dc
dc
cyc
cyc
Typ
cyc
40
75
11
35
. After POR reset, the bus clock
1
1500
1500
Max
Freescale Semiconductor
20
18
MHz
MHz
Unit
μs
μs
ns
ns
ns
ns
ns
Rated
Temp

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