MC9S08QG84CFFER Freescale Semiconductor, MC9S08QG84CFFER Datasheet - Page 23

IC MCU 8BIT 8K FLASH 16-QFN

MC9S08QG84CFFER

Manufacturer Part Number
MC9S08QG84CFFER
Description
IC MCU 8BIT 8K FLASH 16-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG84CFFER

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-QFN
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Data Ram Size
512 B
On-chip Adc
Yes
Number Of Programmable I/os
12
Number Of Timers
1
Mounting Style
SMD/SMT
Height
1 mm
Interface Type
I2C, SCI, SPI
Length
5 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V
Width
5 mm
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Table 1-2
System Clock Distribution
Figure 1-2
inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module
function. All memory mapped registers associated with the modules are clocked with BUSCLK.
Freescale Semiconductor
EXTAL
* ICSERCLK requires XOSC module.
** ICSLCLK is the alternate BDC clock source for the MC9S08QG8/4.
XOSC
ICS
XTAL
provides the functional versions of the on-chip modules.
shows a simplified clock connection diagram. Some modules in the MCU have selectable clock
ICSFFE
ICSFFCLK
ICSOUT
ICSLCLK**
ICSERCLK*
÷
CONTROL
2
SYSTEM
LOGIC
1-kHz
÷
2
Analog Comparator
Analog-to-Digital Converter
Central Processing Unit
IIC Module
Internal Clock Source
Keyboard Interrupt
Modulo Timer
Serial Communications Interface
Serial Peripheral Interface
Timer Pulse-Width Modulator
Low-Power Oscillator
Debug Module
FIXED FREQ CLOCK (XCLK)
Figure 1-2. System Clock Distribution Diagram
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
BUSCLK
Table 1-2. Versions of On-Chip Modules
COP
RTI
Module
TPM
BDC
TCLK
MTIM
(ACMP)
(ADC)
(CPU)
(IIC)
(ICS)
(KBI)
(MTIM)
(SCI)
(SPI)
(TPM)
(XOSC)
(DBG)
CPU
IIC
ADC has min and max
frequency requirements.
See the ADC chapter
and
Appendix A, “Electrical
Characteristics.”
Version
ADC
2
1
2
1
1
2
1
3
3
2
1
2
SCI
Chapter 1 Device Overview
SPI
FLASH has frequency
requirements for
program
and erase operation.
See
“Electrical
Characteristics.”
FLASH
Appendix A,
21

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