STM32F103ZCT6 STMicroelectronics, STM32F103ZCT6 Datasheet - Page 17

MCU ARM 32BIT 256K FLASH 144LQFP

STM32F103ZCT6

Manufacturer Part Number
STM32F103ZCT6
Description
MCU ARM 32BIT 256K FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32F103ZCT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
112
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 21x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
(ARM Cortex) STM32
No. Of I/o's
112
Ram Memory Size
32KB
Cpu Speed
72MHz
No. Of Timers
8
Featured Product
STM32 Cortex-M3 Companion Products
Eeprom Size
-
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Interface Type
CAN/I2C/SPI/USART
Total Internal Ram Size
48KB
# I/os (max)
112
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
On-chip Adc
3(21-chx12-bit)
On-chip Dac
2(2-chx12-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
For Use With
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Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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STM32F103xC, STM32F103xD, STM32F103xE
2.3.10
2.3.11
2.3.12
2.3.13
Boot modes
At startup, boot pins are used to select one of three boot options:
The boot loader is located in system memory. It is used to reprogram the Flash memory by
using USART1.
Power supply schemes
For more details on how to connect power pins, refer to
Power supply supervisor
The device has an integrated power-on reset (POR)/power-down reset (PDR) circuitry. It is
always active, and ensures proper operation starting from/down to 2 V. The device remains
in reset mode when V
external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
generated when V
than the V
message and/or put the MCU into a safe state. The PVD is enabled by software. Refer to
Table 12: Embedded reset and power control block characteristics
V
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
This regulator is always enabled after reset. It is disabled in Standby mode.
DD
POR/PDR
/V
Boot from user Flash: you have an option to boot from any of two memory banks. By
default, boot from Flash memory bank 1 is selected. You can choose to boot from Flash
memory bank 2 by setting a bit in the option bytes.
Boot from system memory
Boot from embedded SRAM
V
Provided externally through V
V
RCs and PLL (minimum voltage to be applied to VDDA is 2.4 V when the ADC or DAC
is used). V
V
registers (through power switch) when V
MR is used in the nominal regulation mode (Run)
LPR is used in the Stop modes.
Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
DD
SSA
BAT
DDA
= 2.0 to 3.6 V: external power supply for I/Os and the internal regulator.
, V
= 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup
PVD
and V
power supply and compares it to the V
DDA
threshold. The interrupt service routine can then generate a warning
DDA
PVD
= 2.0 to 3.6 V: external analog power supplies for ADC, DAC, Reset blocks,
DD
and V
.
/V
DD
DDA
is below a specified threshold, V
SSA
drops below the V
must be connected to V
Doc ID 14611 Rev 8
DD
pins.
DD
PVD
is not present.
PVD
threshold and/or when V
threshold. An interrupt can be
DD
Figure 12: Power supply
and V
POR/PDR
SS
, respectively.
, without the need for an
for the values of
DD
/V
DDA
Description
scheme.
is higher
17/130

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