Z8F4822AR020EC Zilog, Z8F4822AR020EC Datasheet - Page 188

IC ENCORE MCU FLASH 48K 64LQFP

Z8F4822AR020EC

Manufacturer Part Number
Z8F4822AR020EC
Description
IC ENCORE MCU FLASH 48K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F4822AR020EC

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
269-3289

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Manufacturer
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Zilog
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PS019921-0308
DMA Control of the ADC
Follow the steps below for setting up the ADC and initiating continuous conversion:
1. Enable the desired analog input by configuring the general-purpose I/O pins for
2. Write to the ADC Control register to configure the ADC for continuous conversion.
3. When the first conversion in continuous operation is complete (after 5129 system
4. Thereafter, the ADC writes a new 10-bit data result to {ADCD_H[7:0],
5. To disable continuous conversion, clear the CONT bit in the ADC Control register
The Direct Memory Access (DMA) Controller can control operation of the ADC includ-
ing analog input selection and conversion enable. For more information on the DMA and
configuring for ADC operations, see
alternate function. This disables the digital input and output driver.
The bit fields in the ADC Control register may be written simultaneously:
clock cycles, plus the 40 cycles for power-up, if necessary), the ADC control logic
performs the following operations:
ADCD_L[7:6]} every 256 system clock cycles. An interrupt request is sent to the
Interrupt Controller when each conversion is complete.
to 0.
Write to the ANAIN[3:0] field to select one of the 12 analog input sources.
Set CONT to 1 to select continuous conversion.
Write to the VREF bit to enable or disable the internal voltage reference generator.
Set CEN to 1 to start the conversions.
CEN resets to 0 to indicate the first conversion is complete. CEN remains 0 for all
subsequent conversions in continuous operation.
An interrupt request is sent to the Interrupt Controller to indicate the conversion is
complete.
Direct Memory Access Controller
Z8 Encore! XP
Product Specification
Analog-to-Digital Converter
on page 161.
®
F64XX Series
174

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