Z8F0822PJ020SG Zilog, Z8F0822PJ020SG Datasheet - Page 97
Z8F0822PJ020SG
Manufacturer Part Number
Z8F0822PJ020SG
Description
IC ENCORE MCU FLASH 8K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F0822PJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Controller Family/series
Z8
No. Of I/o's
19
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
Z8F082xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4208
Z8F0822PJ020SG
Z8F0822PJ020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0822PJ020SG
Manufacturer:
Zilog
Quantity:
45
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PS022517-0508
Watchdog Timer Refresh
Watchdog Timer Time-Out Response
When first enabled, the WDT is loaded with the value in the WDT Reload registers. The
WDT then counts down to
CPU. Execution of the WDT instruction causes the downcounter to be reloaded with the
WDT Reload value stored in the WDT Reload registers. Counting resumes following the
reload operation.
When Z8 Encore! XP
OCD), the WDT is continuously refreshed to prevent spurious WDT time-outs.
The WDT times out when the counter reaches
either an Interrupt or a Reset. The
of the WDT. For information regarding programming of the
Option Bits
WDT Interrupt in Normal Operation
If configured to generate an interrupt when a time-out occurs, the WDT issues an interrupt
request to the interrupt controller and sets the
If interrupts are enabled, the eZ8 CPU responds to the interrupt request by fetching the
WDT interrupt vector and executing the code from the vector address. After time-out and
interrupt generation, the WDT counter rolls over to its maximum value of
continues counting. The WDT counter is not automatically returned to its Reload Value.
WDT Reset in STOP Mode
If enabled in STOP mode and configured to generate a Reset when a time-out occurs and
the device is in STOP mode, the WDT initiates a Stop Mode Recovery. Both the
status bit and the
WDT time-out in STOP mode. For more information, see
on page 39. Default operation is for the WDT and its RC oscillator to be enabled during
STOP mode.
To minimize power consumption in STOP mode, the WDT and its RC oscillator is
disabled in STOP mode. The following sequence configures the WDT to be disabled when
the Z8F082x family device enters STOP mode following execution of a STOP instruction:
1. Write
2. Write
3. Write
and its oscillator to be disabled during STOP mode. Alternatively, write
WDTCTL as the third step in this sequence to reconfigure the WDT and its oscillator
to be enabled during STOP mode. This sequence only affects WDT operation in STOP
mode.
81H
55H
AAH
on page 163.
to the Watchdog Timer Control Register (WDTCTL) to configure the WDT
to the Watchdog Timer Control Register (WDTCTL).
to the Watchdog Timer Control Register (WDTCTL).
STOP
®
bit in the WDT Control Register is set to 1 following the
F0822 Series device is operating in DEBUG Mode (using the
000000H
WDT_RES
unless a WDT instruction is executed by the eZ8
Option Bit determines the time-out response
WDT
000000H
Status Bit in the WDT Control Register.
Z8 Encore! XP
. A WDT time-out generates
Reset and Stop Mode Recovery
WDT_RES
Product Specification
Option Bit, see
®
FFFFFH
F0822 Series
Watchdog Timer
00H
WDT
to the
and
84
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