Z8F0822PJ020SG Zilog, Z8F0822PJ020SG Datasheet - Page 62
Z8F0822PJ020SG
Manufacturer Part Number
Z8F0822PJ020SG
Description
IC ENCORE MCU FLASH 8K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F0822PJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Controller Family/series
Z8
No. Of I/o's
19
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
Z8F082xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4208
Z8F0822PJ020SG
Z8F0822PJ020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F0822PJ020SG
Manufacturer:
Zilog
Quantity:
45
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GPIO Interrupts
GPIO Control Register Definitions
PS022517-0508
Table 12. Port Alternate Function Mapping (Continued)
Many of GPIO port pins are used as interrupt sources. Some port pins are configured to
generate an interrupt request on either the rising edge or falling edge of the pin input
signal. Other port pin interrupts generate an interrupt when any edge occurs (both rising
and falling). For more details on interrupts using the GPIO pins, see
Diagram
Four registers for each port provide access to GPIO control, input data, and output data.
Table 13
Control Registers together to provide access to sub-registers for Port configuration and
control.
Table 13. GPIO Port Registers and Sub-Registers
Port
Port C
Port Register Mnemonic
PxADDR
PxCTL
PxIN
PxOUT
Port Sub-Register Mnemonic Port Register Name
PxDD
PxAF
lists the GPIO Port Registers and Sub-Registers. Use the Port A–C Address and
on page 48.
Pin
PC0
PC1
PC2
PC3
PC4
PC5
Mnemonic
T1IN
T1OUT
SS
SCK
MOSI
MISO
Port Register Name
Port A–C Address Register
(selects sub-registers)
Port A–C Control Register
(provides access to sub-registers)
Port A–C Input Data Register
Port A–C Output Data Register
Data Direction
Alternate Function
Alternate Function Description
Timer 1 Input
Timer 1 Output
SPI Slave Select
SPI Serial Clock
SPI Master Out Slave In
SPI Master In Slave Out
Z8 Encore! XP
General-Purpose Input/Output
Product Specification
GPIO Port Pin Block
®
F0822 Series
49
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