Z8F0822PJ020SG Zilog, Z8F0822PJ020SG Datasheet - Page 55

IC ENCORE MCU FLASH 8K 28DIP

Z8F0822PJ020SG

Manufacturer Part Number
Z8F0822PJ020SG
Description
IC ENCORE MCU FLASH 8K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F0822PJ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Controller Family/series
Z8
No. Of I/o's
19
Ram Memory Size
1KB
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Processor Series
Z8F082xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4208
Z8F0822PJ020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F0822PJ020SG
Manufacturer:
Zilog
Quantity:
45
PS022517-0508
Internal RESET
WDT Clock
V
Oscillator
Primary
CC
signal
Watchdog Timer Reset
= 3.3 V
VVBO
V
POR
remains below the POR voltage threshold (V
Reset state.
After the supply voltage again exceeds the POR voltage threshold, the device progresses
through a full System Reset sequence as described in the POR section. Following POR,
the POR status bit in the Watchdog Timer Control Register (WDTCTL) is set to 1.
Figure 7
VBO and POR threshold voltages (V
The VBO circuit can be either enabled or disabled during STOP mode. Operation during
STOP mode is set by the VBO_AO Option Bit. For information on configuring VBO_AO,
see
If the device is in NORMAL or HALT mode, WDT initiates a System Reset at time-out, if
the WDT_RES Option Bit is set to 1. This is the default (unprogrammed) setting of the
WDT_RES Option Bit. The
that the reset was initiated by the WDT.
Option Bits
Execution
Program
displays the VBO operation. See
Figure 7. Voltage Brownout Reset Operation
on page 163.
Brownout
Voltage
WDT
status bit in the WDT Control Register is set to signify
Counter Delay
VBO
POR
and V
Electrical Characteristics
POR
POR
), the VBO block holds the device in the
).
Counter Delay
Z8 Encore! XP
XTAL
Reset and Stop Mode Recovery
Product Specification
Execution
on page 185 for the
Program
®
F0822 Series
V
CC
= 3.3 V
42

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