Z8F012ASB020EG Zilog, Z8F012ASB020EG Datasheet - Page 249
Z8F012ASB020EG
Manufacturer Part Number
Z8F012ASB020EG
Description
IC ENCORE XP MCU FLASH 1K 8SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F011ASB020EG.pdf
(282 pages)
Specifications of Z8F012ASB020EG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
6
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
Z8F012Ax
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4038
Z8F012ASB020EG
Z8F012ASB020EG
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PS022825-0908
(Output)
(Output)
TXD
(Input)
CTS
DE
UART Timing
Figure 37
CTS is used for flow control. The CTS to DE assertion delay (T1) assumes the transmit
data register has been loaded with data prior to CTS assertion.
Table 142. UART Timing With CTS
Parameter
UART
T
T
T
bit 7
1
2
3
parity
and
Abbreviation
CTS Fall to DE output delay
DE assertion to TXD falling edge (start bit) delay ± 5
End of Stop Bit(s) to DE deassertion delay
Table 142
stop
Figure 37. UART Timing With CTS
end of
stop bit(s)
T3
provide timing information for UART pins for the case where
T1
Z8 Encore! XP
T2
Minimum
2 * XIN
period
± 5
Product Specification
start
Electrical Characteristics
Delay (ns)
®
F082A Series
2 * XIN period
+ 1 bit time
bit 0
Maximum
bit 1
238
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