Z8F012ASB020EG Zilog, Z8F012ASB020EG Datasheet - Page 145

• Manufacturer Part Number: Z8F012ASB020EG
• Description: IC ENCORE XP MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F012ASB020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: Z8F012Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4038; Z8F012ASB020EG

Low Power Operational Amplifier
Overview
Operation
PS022825-0908
Warning:
The LPO is a general-purpose low power operational amplifier. Each of the three ports of
the amplifier is accessible from the package pins. The LPO contains only one pin configu-
ration: ANA0 is the output/feedback node, ANA1 is the inverting input and ANA2 is the
non-inverting input.
To use the LPO, it must be enabled in the
default state of the LPO is OFF. To use the LPO, the LPO bit must be cleared, turning it
ON
measurements on ANA0 (measurements not involving the LPO output), the LPO bit must
be OFF. Turning the LPO bit ON interferes with normal ADC measurements.
As with other ADC measurements, any pins used for analog purposes must be configured
as such in the GPIO registers (see
page 47).
LPO output measurements are made on ANA0, as selected by the
ADC Control Register
and ANA2 while the amplifier is enabled, which is often useful for determining offset con-
ditions. Differential measurements between ANA0 and ANA2 may be useful for noise
cancellation purposes.
If the LPO output is routed to the ADC, then the
tus Register 1
LPO in an unbuffered mode is not recommended.
When either input is overdriven, the amplifier output saturates at the positive or negative
supply voltage. No instability results.
The LPO bit enables the amplifier even in STOP mode. If the amplifier is not required
in STOP mode, disable it. Failing to perform this results in STOP mode currents
higher than necessary.
(Power Control Register 0 (PWRCTL0)
must also be configured for unity-gain buffered operation. Sampling the
0. It is also possible to make single-ended measurements on ANA1
Port A–D Alternate Function Sub-Registers
Power Control Register 0
on page 35). When making normal ADC
BUFFMODE
Z8 Encore! XP
[2:0] bits of
Low Power Operational Amplifier
Product Specification
ANAIN[3:0]
(PWRCTL0). The
ADC Control/Sta-
®
F082A Series
on
bits of
134