Z8F0113PJ005SG Zilog, Z8F0113PJ005SG Datasheet - Page 58
Z8F0113PJ005SG
Manufacturer Part Number
Z8F0113PJ005SG
Description
IC ENCORE MCU FLASH 1K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0113PJ005SG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-3995
Z8F0113PJ005SG
Z8F0113PJ005SG
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Table 25. Port A–C Pull-Up Enable Sub-Registers (PxPUE)
BITS
FIELD
RESET
R/W
ADDR
PS024314-0308
Note:
PPUE7
R/W
If 06H in Port A
7
0
PSMRE[7:0]—Port Stop Mode Recovery Source Enabled.
0 = The Port pin is not configured as a Stop Mode Recovery source. Transitions on this pin
during STOP mode do not initiate Stop Mode Recovery.
1 = The Port pin is configured as a Stop Mode Recovery source. Any logic transition on
this pin during STOP mode initiates Stop Mode Recovery.
Port A–C Pull-up Enable Sub-Registers
The Port A–C Pull-up Enable sub-register
Control register by writing
Port A–C Pull-up Enable sub-registers enables a weak internal resistive pull-up on the
specified Port pins.
PPUE[7:0]—Port Pull-up Enabled
0 = The weak pull-up on the Port pin is disabled.
1 = The weak pull-up on the Port pin is enabled.
Port A–C Alternate Function Set 1 Sub-Registers
The Port A–C Alternate Function Set1 sub-register
A–C Control register by writing
Function Set 1 sub-registers selects the alternate function available at a port pin. Alternate
Functions selected by setting or clearing bits of this register are defined in
Functions
Alternate function selection on port pins must also be enabled as described in
Alternate Function Sub-Registers
PPUE6
R/W
on page 36.
6
0
–
C Address Register, accessible through the Port A
PPUE5
R/W
5
0
06H
to the Port A–C Address register. Setting the bits in the
PPUE4
07H
R/W
on page 45
4
0
to the Port A–C Address register. The Alternate
(Table
PPUE3
.
R/W
3
0
25) is accessed through the Port A–C
(Table
Z8 Encore! XP
PPUE2
R/W
26) is accessed through the Port
2
0
General-Purpose Input/Output
Product Specification
–
C Control Register
PPUE1
R/W
1
0
®
GPIO Alternate
F0823 Series
Port A–C
PPUE0
R/W
0
0
48
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