Z8F0113PJ005SG Zilog, Z8F0113PJ005SG Datasheet - Page 189
Z8F0113PJ005SG
Manufacturer Part Number
Z8F0113PJ005SG
Description
IC ENCORE MCU FLASH 1K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0113PJ005SG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-3995
Z8F0113PJ005SG
Z8F0113PJ005SG
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eZ8 CPU Instruction Summary
.
Table 115. eZ8 CPU Instruction Summary
PS024314-0308
Assembly
Mnemonic
ADC dst, src
ADCX dst, src
ADD dst, src
ADDX dst, src
Flags Notation:
Table 114. Rotate and Shift Instructions (Continued)
Table 115
modes employed by the instruction, the effect upon the Flags register, the number of CPU
clock cycles required for the instruction fetch, and the number of CPU clock cycles
required for the instruction execution.
Mnemonic
SRA
SRL
SWAP
Symbolic Operation
dst ← dst + src + C
dst ← dst + src + C
dst ← dst + src
dst ← dst + src
* = Value is a function of the result of the operation.
– = Unaffected
X = Undefined
summarizes the eZ8 CPU instructions. The table identifies the addressing
Operands
dst
dst
dst
Address Mode
dst
ER
ER
ER
ER
IR
IR
Instruction
Shift Right Arithmetic
Shift Right Logical
Swap Nibbles
R
R
R
R
R
R
r
r
r
r
src
ER
ER
IM
IM
IM
IM
IM
IM
IR
IR
R
R
Ir
Ir
r
r
Opcode(s)
(Hex)
12
13
14
15
16
17
18
19
02
03
04
05
06
07
08
09
Flags
C
0 = Reset to 0
1 = Set to 1
*
*
*
*
Z8 Encore! XP
Z
*
*
*
*
S V D
*
*
*
*
Product Specification
*
*
*
*
eZ8 CPU Instruction Set
0
0
0
0
H
*
*
*
*
®
F0823 Series
Fetch
Cycles
2
2
3
3
3
3
4
4
2
2
3
3
3
3
4
4
Instr.
Cycles
3
4
3
4
3
4
3
3
3
4
3
4
3
4
3
3
179
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