Z8F0113PJ005SG Zilog, Z8F0113PJ005SG Datasheet - Page 107
Z8F0113PJ005SG
Manufacturer Part Number
Z8F0113PJ005SG
Description
IC ENCORE MCU FLASH 1K 28DIP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet
1.Z8F0223SB005SG.pdf
(247 pages)
Specifications of Z8F0113PJ005SG
Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-3995
Z8F0113PJ005SG
Z8F0113PJ005SG
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PS024314-0308
Receiving Data using the Polled Method
The UART is now configured for interrupt-driven data transmission. Because the UART
Transmit Data register is empty, an interrupt is generated immediately. When the UART
Transmit interrupt is detected, the associated interrupt service routine (ISR) performs the
following:
1. Write the UART Control 1 register to select the multiprocessor bit for the byte to be
2. Write the data byte to the UART Transmit Data register. The transmitter automatically
3. Clear the UART Transmit interrupt bit in the applicable Interrupt Request register.
4. Execute the
Follow the steps below to configure the UART for polled data reception:
1. Write to the UART Baud Rate High and Low Byte registers to set an acceptable baud
2. Enable the UART pin functions by configuring the associated GPIO port pins for
3. Write to the UART Control 1 register to enable MULTIPROCESSOR mode functions,
4. Write to the UART Control 0 register to:
5. Check the RDA bit in the UART Status 0 register to determine if the Receive Data
6. Read data from the UART Receive Data register. If operating in MULTIPROCESSOR
7. Return to
transmitted:
Set the Multiprocessor Bit Transmitter (MPBT) if sending an address byte, clear it if
sending a data byte.
transfers the data to the Transmit Shift register and transmits the data.
the Transmit Data register to again become empty.
rate for the incoming data stream.
alternate function operation.
if appropriate.
–
–
register contains a valid data byte (indicated by a 1). If RDA is set to 1 to indicate
available data, continue to
0), continue to monitor the RDA bit awaiting reception of the valid data.
(9-bit) mode, further actions may be required depending on the MULTIPROCESSOR
mode bits MPMD[1:0].
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if appropriate and if Multiprocessor mode is not enabled, and select
either even or odd parity
step 4
IRET
to receive additional data.
instruction to return from the interrupt-service routine and wait for
step
6. If the Receive Data register is empty (indicated by a
Universal Asynchronous Receiver/Transmitter
Z8 Encore! XP
Product Specification
®
F0823 Series
97
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