LPC2478FET208,551 NXP Semiconductors, LPC2478FET208,551 Datasheet - Page 771
![IC ARM7 MCU 512K LCD 208-TFBGA](/photos/12/32/123264/lpc2478fet208-s_sml.jpg)
LPC2478FET208,551
Manufacturer Part Number
LPC2478FET208,551
Description
IC ARM7 MCU 512K LCD 208-TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2478FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/IrDA/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, DK-35TS-LPC2478, DK-57TS-LPC2478, DK-57VTS-LPC2478, SOMDIMM-LPC2478, SAB-TFBGA208, KSK-LPC2478-JL, MCB2470
Development Tools By Supplier
OM11015, OM11019, OM11022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1034 - PROGRAMMERS, DEVELOPMENT SYSTEMS622-1033 - KIT LCD TOUCH 5.7" FOR LPC2478MCB2470 - BOARD EVAL NXP LPC247X SERIESOM11022 - EVAL LPC-STICK WITH LPC2478OM11019 - BOARD EVAL FOR LPC2478568-4742 - MODULE DIMM LPC2478 ARM7568-4741 - KIT LCD TOUCH 5.7" FOR LPC2478622-1028 - KIT LCD TOUCH 5.7" FOR LPC2478KSDKLPC2478-PL - KIT IAR KICKSTART NXP LPC2478622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4369 - BOARD EVAL FOR LPC2478622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4364
935284072551
LPC2478FET208-S
935284072551
LPC2478FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2478FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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Table 573.Consolidated Time register 0 (CTIME0 - address
Table 574.Consolidated Time register 1 (CTIME1 - address
Table 575.Consolidated Time register 2 (CTIME2 - address
Table 576.Time Counter relationships and values) . . . . .655
Table 577.Time Counter registers . . . . . . . . . . . . . . . . . .655
Table 578.Alarm registers . . . . . . . . . . . . . . . . . . . . . . . .656
Table 579.Reference Clock Divider registers . . . . . . . . .657
Table 580:Prescaler Integer register (PREINT - address
Table 581:Prescaler Integer register (PREFRAC - address
Table 582.Prescaler cases where the Integer Counter reload
Table 583.Recommended values for the RTC external
Table 584.Summary of Watchdog registers . . . . . . . . . .663
Table 585.Watchdog operating modes selection. . . . . . .664
Table 586:Watchdog Mode register (WDMOD - address
Table 587:Watchdog Constant register (WDTC - address
Table 588:Watchdog Feed Register (WDFEED - address
Table 589:Watchdog Timer Value register (WDTV - address
Table 590:Watchdog Timer Clock Source Selection register
Table 591.ADC pin description . . . . . . . . . . . . . . . . . . . .668
Table 592.Summary of ADC registers . . . . . . . . . . . . . . .668
Table 593:A/D Control Register (AD0CR - address
Table 594:A/D Global Data Register (AD0GDR - address
Table 595:A/D Status Register (AD0STAT - address
Table 596:A/D Interrupt Enable Register (AD0INTEN -
Table 597:A/D Data Registers (AD0DR0 to AD0DR7 -
Table 598.D/A Pin Description . . . . . . . . . . . . . . . . . . . .674
Table 599:D/A Converter Register (DACR - address
Table 600.Sectors in a LPC2400 device . . . . . . . . . . . . .681
Table 601.Code Read Protection options . . . . . . . . . . . .682
Table 602.Code Read Protection hardware/software
Table 603.ISP command summary . . . . . . . . . . . . . . . . .683
Table 604.ISP Unlock command . . . . . . . . . . . . . . . . . . .684
Table 605.ISP Set Baud Rate command. . . . . . . . . . . . .684
Table 606.Correlation between possible ISP baudrates and
Table 607.ISP Echo command . . . . . . . . . . . . . . . . . . . .685
Table 608.ISP Write to RAM command. . . . . . . . . . . . . .685
UM10237_4
User manual
0xE002 4014) bit description . . . . . . . . . . . . .654
0xE002 4018) bit description . . . . . . . . . . . . .654
0xE002 401C) bit description . . . . . . . . . . . . .654
0xE002 4080) bit description . . . . . . . . . . . . .657
0xE002 4084) bit description . . . . . . . . . . . . .657
value is incremented. . . . . . . . . . . . . . . . . . . .659
32 kHz oscillator C
0xE000 0000) bit description . . . . . . . . . . . . .664
0xE000 0004) bit description . . . . . . . . . . . . .664
0xE000 0008) bit description . . . . . . . . . . . . .665
0xE000 000C) bit description . . . . . . . . . . . . .665
(WDCLKSEL - address 0xE000 0010) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .665
0xE003 4000) bit description . . . . . . . . . . . . .669
0xE003 4004) bit description . . . . . . . . . . . . .671
0xE003 4030) bit description . . . . . . . . . . . . .671
address 0xE003 400C) bit description . . . . . .672
addresses 0xE003 4010 to 0xE003 402C) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . .672
0xE006 C000) bit description . . . . . . . . . . . . .675
interaction . . . . . . . . . . . . . . . . . . . . . . . . . . . .683
CCLK frequency (in MHz). . . . . . . . . . . . . . . .684
X1/X2
components . . . . . . .661
Rev. 04 — 26 August 2009
Table 609.ISP Read Memory command. . . . . . . . . . . . . 686
Table 610.ISP Prepare sector(s) for write operation
Table 611. ISP Copy command . . . . . . . . . . . . . . . . . . . . 687
Table 612.ISP Go command. . . . . . . . . . . . . . . . . . . . . . 687
Table 613.ISP Erase sector command . . . . . . . . . . . . . . 688
Table 614.ISP Blank check sector command . . . . . . . . . 688
Table 615.ISP Read Part Identification command . . . . . 688
Table 616.LPC24xx part Identification numbers . . . . . . . 689
Table 617.ISP Read Boot Code version number
Table 618.ISP Compare command. . . . . . . . . . . . . . . . . 689
Table 619.ISP Return Codes Summary . . . . . . . . . . . . . 690
Table 620.IAP Command Summary . . . . . . . . . . . . . . . . 692
Table 621.IAP Prepare sector(s) for write
Table 622.IAP Copy RAM to Flash command . . . . . . . . 693
Table 623.IAP Erase Sector(s) command . . . . . . . . . . . 694
Table 624.IAP Blank check sector(s) command . . . . . . . 694
Table 625.IAP Read Part Identification command . . . . . 694
Table 626.IAP Read Boot Code version number
Table 627.IAP Compare command. . . . . . . . . . . . . . . . . 695
Table 628.Reinvoke ISP . . . . . . . . . . . . . . . . . . . . . . . . . 695
Table 629.IAP Status Codes Summary . . . . . . . . . . . . . 696
Table 630.ISP command summary. . . . . . . . . . . . . . . . . 701
Table 631.ISP Unlock command . . . . . . . . . . . . . . . . . . 701
Table 632.ISP Set Baud Rate command . . . . . . . . . . . . 701
Table 633.Correlation between possible ISP baudrates and
Table 634.ISP Echo command . . . . . . . . . . . . . . . . . . . . 702
Table 635.ISP Write to RAM command . . . . . . . . . . . . . 703
Table 636.ISP Read Memory command. . . . . . . . . . . . . 703
Table 637.ISP Go command. . . . . . . . . . . . . . . . . . . . . . 704
Table 638.ISP Read Part Identification command . . . . . 704
Table 639.LPC24XX part identification numbers . . . . . . 704
Table 640.ISP Read Boot Code version number
Table 641.ISP Compare command. . . . . . . . . . . . . . . . . 705
Table 642.ISP Return Codes Summary . . . . . . . . . . . . . 705
Table 643.IAP Command Summary . . . . . . . . . . . . . . . . 707
Table 644.IAP Read Part Identification command . . . . . 708
Table 645.IAP Read Boot Code version number
Table 646.IAP Compare command. . . . . . . . . . . . . . . . . 709
Table 647.Reinvoke ISP . . . . . . . . . . . . . . . . . . . . . . . . . 709
Table 648.IAP Status Codes Summary . . . . . . . . . . . . . 709
Table 649.GPDMA accessible memory
Table 650.Endian behavior . . . . . . . . . . . . . . . . . . . . . . . 715
Table 651.DMA Connections . . . . . . . . . . . . . . . . . . . . . 717
Table 652.Summary of GPDMA registers. . . . . . . . . . . . 720
Table 653.Interrupt Status register (DMACIntStatus -
Table 654.Interrupt Terminal Count Status register
Table 655.Interrupt Terminal Count Clear register
Chapter 36: LPC24XX Supplementary information
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 686
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 689
operation command . . . . . . . . . . . . . . . . . . . . 693
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 695
CCLK frequency (in MHz) . . . . . . . . . . . . . . . 702
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 704
command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 708
address 0xFFE0 4000) bit description . . . . . . 722
(DMACIntTCStatus - address 0xFFE0 4004) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . 722
(DMACIntClear - address 0xFFE0 4008) bit
UM10237
[1]
© NXP B.V. 2009. All rights reserved.
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