P89LPC938FDH,529 NXP Semiconductors, P89LPC938FDH,529 Datasheet - Page 35

• Manufacturer Part Number: P89LPC938FDH,529
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC938FDH,529

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1011 - BOARD FOR LPC938 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2013-5; 935278546529; P89LPC938FDH-S

Philips Semiconductors
9397 750 14051
Product data sheet
7.21 I
I
to the bus, and it has the following features:
A typical I
byte-oriented I
2
2
Fig 13. I
C-bus uses two wires (SDA and SCL) to transfer information between devices connected
•
•
•
•
•
•
C-bus serial interface
Bi-directional data transfer between masters and slaves
Multi master bus (no central master)
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer
The I
2
2
2
C-bus configuration.
C-bus may be used for test and diagnostic purposes.
C-bus configuration is shown in
I
2
2
C-bus
C-bus interface that supports data transfers up to 400 kHz.
P1.3/SDA
Rev. 01 — 25 February 2005
P89LPC938
P1.2/SCL
8-bit microcontroller with 10-bit A/D converter
OTHER DEVICE
WITH I
R
Figure
INTERFACE
P
2
C-BUS
13. The P89LPC938 device provides a
R
P
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
OTHER DEVICE
WITH I
INTERFACE
2
P89LPC938
C-BUS
002aab105
SDA
SCL
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