P89LPC938FDH,529 NXP Semiconductors, P89LPC938FDH,529 Datasheet - Page 18

• Manufacturer Part Number: P89LPC938FDH,529
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC938FDH,529

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1011 - BOARD FOR LPC938 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2013-5; 935278546529; P89LPC938FDH-S

Table 5:
Name
ADC0HBND
ADC0LBND
AD0DAT0R
AD0DAT0L
AD0DAT1R
AD0DAT1L
AD0DAT2R
AD0DAT2L
AD0DAT3R
AD0DAT3L
AD0DAT4R
AD0DAT4L
AD0DAT5R
AD0DAT5L
AD0DAT6R
AD0DAT6L
AD0DAT7R
AD0DAT7L
BNDSTA0
P89LPC938 extended special function registers
Description
ADC0 high _boundary register, left
(MSB)
ADC0 low_boundary register (MSB)
ADC0 data register 0, right (LSB)
ADC0 data register 0, left (MSB)
ADC0 data register 1, right (LSB)
ADC0 data register 1, left (MSB)
ADC0 data register 2, right (LSB)
ADC0 data register 2, left (MSB)
ADC0 data register 3, right (LSB)
ADC0 data register 3, left (MSB)
ADC0 data register 4, right (LSB)
ADC0 data register 4, left (MSB)
ADC0 data register 5, right (LSB)
ADC0 data register 5, left (MSB)
ADC0 data register 6, right (LSB)
ADC0 data register 6, left (MSB)
ADC0 data register 7, right (LSB)
ADC0 data register 7, left (MSB)
ADC0 boundary status register
SFR addr.
FFEEh
FFFCh
FFFDh
FFEDh
FFEFh
FFFEh
FFFFh
FFFAh
FFFBh
FFF8h
FFF9h
FFF6h
FFF7h
FFF4h
FFF5h
FFF2h
FFF3h
FFF0h
FFF1h
Bit functions and addresses
MSB
AD0DAT0[7:0]
AD0DAT0[9:2]
AD0DAT1[7:0]
AD0DAT1[9:2]
AD0DAT2[7:0]
AD0DAT2[9:2]
AD0DAT3[7:0]
AD0DAT3[9:2]
AD0DAT4[7:0]
AD0DAT4[9:2]
AD0DAT5[7:0]
AD0DAT5[9:2]
AD0DAT6[7:0]
AD0DAT6[9:2]
AD0DAT7[7:0]
AD0DAT7[9:2]
LSB
Reset value
Hex
FF
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Binary
11111111
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000