P89LPC938FDH,529 NXP Semiconductors, P89LPC938FDH,529 Datasheet - Page 19

• Manufacturer Part Number: P89LPC938FDH,529
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC938FDH,529

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1011 - BOARD FOR LPC938 TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2013-5; 935278546529; P89LPC938FDH-S

Philips Semiconductors
9397 750 14051
Product data sheet
7.3.1 Clock definitions
7.3.2 CPU clock (OSCCLK)
7.3.3 Low speed oscillator option
7.3.4 Medium speed oscillator option
7.3.5 High speed oscillator option
7.3.6 Clock output
7.2 Enhanced CPU
7.3 Clocks
The P89LPC938 uses an enhanced 80C51 CPU which runs at six times the speed of
standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most
instructions execute in one or two machine cycles.
The P89LPC938 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see
Section 7.8 “CCLK modification: DIVM
Note: f
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output.
PCLK — Clock for the various peripheral devices and is
The P89LPC938 provides several user-selectable oscillator options in generating the CPU
clock. This allows optimization for a range of needs from high precision to lowest possible
cost. These options are configured when the Flash is programmed and include an on-chip
watchdog oscillator, an on-chip RC oscillator, an oscillator using an external crystal, or an
external clock source. The crystal oscillator can be optimized for low, medium, or high
frequency crystals covering a range from 20 kHz to 18 MHz.
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this configuration.
The P89LPC938 supports a user-selectable clock output function on the XTAL2/CLKOUT
pin when crystal oscillator is not being used. This condition occurs if another clock source
has been selected (on-chip RC oscillator, watchdog oscillator, external clock input on X1)
and if the RTC is not using the crystal oscillator as its clock source. This allows external
devices to synchronize to the P89LPC938. This output is enabled by the ENCLK bit in the
TRIM register.
osc
is defined as the OSCCLK frequency.
Figure
6) and can also be optionally divided to a slower frequency (see
Rev. 01 — 25 February 2005
register”).
8-bit microcontroller with 10-bit A/D converter
CCLK
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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