P89LPC931A1FDH,512 NXP Semiconductors, P89LPC931A1FDH,512 Datasheet - Page 54
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P89LPC931A1FDH,512
Manufacturer Part Number
P89LPC931A1FDH,512
Description
IC 80C51 MCU FLASH 8K 28-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet
1.P89LPC9301FDH512.pdf
(66 pages)
Specifications of P89LPC931A1FDH,512
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935288634512
NXP Semiconductors
Table 13.
V
T
P89LPC9301_931A1
Product data sheet
Symbol Parameter
f
f
f
T
f
Glitch filter
t
t
External clock
t
t
t
t
Shift register (UART mode 0)
T
t
t
t
t
SPI interface
f
T
osc(RC)
osc(WD)
osc
CLKLP
gr
sa
CHCX
CLCX
CLCH
CHCL
QVXH
XHQX
XHDX
XHDV
SPI
amb
DD
cy(clk)
XLXL
SPICYC
= 3.0 V to 3.6 V unless otherwise specified.
=
40
internal RC oscillator
frequency
internal watchdog
oscillator frequency
oscillator frequency
clock cycle time
low-power select clock
frequency
glitch rejection time
signal acceptance time
clock HIGH time
clock LOW time
clock rise time
clock fall time
serial port clock cycle
time
output data set-up to
clock rising edge time
output data hold after
clock rising edge time
input data hold after
clock rising edge time
input data valid to clock
rising edge time
SPI operating frequency
SPI cycle time
Dynamic characteristics (18 MHz)
C to +85
slave
master
slave
master
C for industrial applications, unless otherwise specified.
T
P1.5/RST pin
P1.5/RST pin
any pin except P1.5/RST
see
see
Conditions
nominal f = 7.3728 MHz
trimmed to 1 % at
doubler option = OFF
(default)
nominal f = 14.7456 MHz;
clock doubler option = ON
T
see
any pin except P1.5/RST
see
see
see
see
see
see
see
see
amb
amb
Figure 32
Figure 32
Figure 32
Figure 32
Figure 32
Figure 31
Figure 31
Figure 31
Figure 31
Figure 31
Figure
All information provided in this document is subject to legal disclaimers.
= 25 C; clock
= 25 C
33, 34, 35,
Rev. 2 — 29 November 2010
8-bit microcontroller with accelerated two-clock 80C51 core
36
16T
13T
14.378
7.189
6
4
Min
⁄
⁄
380
125
150
CCLK
CCLK
55
50
22
22
0
0
0
cy(clk)
cy(clk)
-
-
-
-
-
-
-
Variable clock
P89LPC9301/931A1
[1][2]
T
T
cy(clk)
T
cy(clk)
cy(clk)
15.114
CCLK
CCLK
7.557
Max
420
18
50
15
8
5
5
0
-
-
-
-
-
-
-
-
t
t
+ 20
⁄
⁄
6
4
CHCX
CLCX
14.378 15.114 MHz
f
7.189
osc
Min
380
125
888
722
150
333
222
50
22
22
© NXP B.V. 2010. All rights reserved.
0
-
-
-
-
-
-
-
-
-
-
= 18 MHz
7.557 MHz
Max
420
3.0
4.5
50
15
75
5
5
0
-
-
-
-
-
-
-
-
-
-
-
-
54 of 66
Unit
kHz
MHz
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns