P89LPC931A1FDH,512 NXP Semiconductors, P89LPC931A1FDH,512 Datasheet - Page 40
![IC 80C51 MCU FLASH 8K 28-TSSOP](/photos/6/52/65262/568-28-tssop_sot361-1_sml.jpg)
P89LPC931A1FDH,512
Manufacturer Part Number
P89LPC931A1FDH,512
Description
IC 80C51 MCU FLASH 8K 28-TSSOP
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet
1.P89LPC9301FDH512.pdf
(66 pages)
Specifications of P89LPC931A1FDH,512
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
28-TSSOP
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935288634512
NXP Semiconductors
P89LPC9301_931A1
Product data sheet
7.29.10 Hardware activation of the bootloader
7.30 User configuration bytes
7.31 User sector security bytes
Remark: Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this bootloader. Instead, the page erase function can be used to
erase the first eight 64-byte pages located in this sector.
A custom bootloader can be written with the Boot Vector set to the custom bootloader, if
desired.
Table 8.
The bootloader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC9301/931A1 User manual for specific information).
This has the same effect as having a non-zero status byte. This allows an application to
be built that will normally execute user code but can be manually forced into ISP
operation. If the factory default setting for the boot vector is changed, it will no longer point
to the factory pre-programmed ISP bootloader code. After programming the flash, the
status byte should be programmed to zero in order to allow execution of the user’s
application code beginning at address 0000H.
Some user-configurable features of the P89LPC9301/931A1 must be defined at power-up
and therefore cannot be set by the program after start of execution. These features are
configured through the use of the flash byte UCFG1 and UCFG2. Please see the
P89LPC9301/931A1 User manual for additional details.
There are four/eight User Sector Security Bytes on the P89LPC9301/931A1. Each byte
corresponds to one sector. Please see the P89LPC9301/931A1 User manual for
additional details.
Device
P89LPC9301
P89LPC931A1
Default boot vector values and ISP entry points
All information provided in this document is subject to legal disclaimers.
Default
boot vector
0FH
1FH
Rev. 2 — 29 November 2010
8-bit microcontroller with accelerated two-clock 80C51 core
Default
bootloader
entry point
0F00H
1F00H
P89LPC9301/931A1
Default bootloader
code range
0E00H to 0FFFH
1E00H to 1FFFH
© NXP B.V. 2010. All rights reserved.
1 kB sector
range
0C00H to 0FFFH
1C00H to 1FFFH
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