AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 147

• Manufacturer Part Number: AT91SAM9XE512-CU
• Description: MCU ARM9 512K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 96
• Interface Type: EBI/Ethernet/SPI/TWI/USART/USB
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 6
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 180 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

20.3.2.2
Figure 20-5. Data Read Optimization in ARM Mode for FWS = 1
6254C–ATARM–22-Jan-10
Buffer (128bits)
Flash Access
ARM Request
Data To ARM
Master Clock
(32-bit)
Data Read Optimization
@Byte 0
XXX
XXX
XXX
The organization of the Flash in 128 bits is associated with two 128-bit prefetch buffers and one
128-bit data read buffer, thus providing maximum system performance. This buffer is added in
order to start access at the following data during the second read. This speeds up sequential
data reads if, for example, FWS is equal to 1 (see
Note:
Bytes 0-15
Bytes 0-3
@ 4
No consecutive data read accesses are mandatory to benefit from this optimization.
@ 8
4-7
@ 12
AT91SAM9XE128/256/512 Preliminary
8-11
Bytes 0-15
12-15
@ 16
Bytes 16-31
@ 20
16-19
Figure
@ 24
20-23
20-5).
24-27
@ 28
Bytes 16-31
28-31
@ 32
Bytes 32-47
@ 36
32-35
147