AT91SAM7X512-CU Atmel, AT91SAM7X512-CU Datasheet - Page 481

MCU ARM 512K HS FLASH 100-TFBGA

AT91SAM7X512-CU

Manufacturer Part Number
AT91SAM7X512-CU
Description
MCU ARM 512K HS FLASH 100-TFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7X512-CU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
CAN, Ethernet, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
62
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
128 KB
Interface Type
CAN, SPI, SSC, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM7X-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7X-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
100TFBGA
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
55 MHz
Cpu Family
91S
Device Core Size
32b
Frequency (max)
55MHz
Total Internal Ram Size
128KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TFBGA
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7X-EK - KIT EVAL FOR AT91SAM7X256/128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7X512-CU
Manufacturer:
Atmel
Quantity:
10 000
• RX_DATA_BK1: Receive Data Bank 1 (only used by endpoints with ping-pong attributes)
This flag generates an interrupt while it is set to one.
Write (Cleared by the firmware):
0 = Notifies USB device that data have been read in the FIFO’s Bank 1.
1 = No effect.
Read (Set by the USB peripheral):
0 = No data packet has been received in the FIFO's Bank 1.
1 = A data packet has been received, it has been stored in FIFO's Bank 1.
When the device firmware has polled this bit or has been interrupted by this signal, it must transfer data from the FIFO to
microcontroller memory. The number of bytes received is available in RXBYTECNT field. Bank 1 FIFO values are read
through UDP_ FDRx register. Once a transfer is done, the device firmware must release Bank 1 to the USB device by
clearing RX_DATA_BK1.
• DIR: Transfer Direction (only available for control endpoints)
Read/Write
0 = Allows Data OUT transactions in the control data stage.
1 = Enables Data IN transactions in the control data stage.
Refer to Chapter 8.5.3 of the Universal Serial Bus Specification, Rev. 2.0 for more information on the control data stage.
This bit must be set before UDP_ CSRx/RXSETUP is cleared at the end of the setup stage. According to the request sent
in the setup data packet, the data stage is either a device to host (DIR = 1) or host to device (DIR = 0) data transfer. It is not
necessary to check this bit to reverse direction for the status stage.
• EPTYPE[2:0]: Endpoint Type
Read/Write
• DTGLE: Data Toggle
Read-only
0 = Identifies DATA0 packet.
1 = Identifies DATA1 packet.
Refer to Chapter 8 of the Universal Serial Bus Specification, Rev. 2.0 for more information on DATA0, DATA1 packet
definitions.
6120H–ATARM–17-Feb-09
000
001
101
010
110
011
111
Control
Isochronous OUT
Isochronous IN
Bulk OUT
Bulk IN
Interrupt OUT
Interrupt IN
AT91SAM7X512/256/128 Preliminary
481

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